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drm/i915: Write to display base last.
authorChris Wilson <chris@chris-wilson.co.uk>
Sat, 7 Aug 2010 10:01:29 +0000 (11:01 +0100)
committerEric Anholt <eric@anholt.net>
Mon, 9 Aug 2010 18:24:34 +0000 (11:24 -0700)
Writing to the DSPBASE register triggers the double-buffered update to
all the control registers, so always write it last in the update
sequence.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Eric Anholt <eric@anholt.net>
drivers/gpu/drm/i915/intel_display.c patch | blob | history

diff --cc drivers/gpu/drm/i915/intel_display.c
Simple merge
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