drivers: clk: Remove duplicate newlines
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Sat, 20 Jul 2024 12:40:30 +0000 (14:40 +0200)
committerTom Rini <trini@konsulko.com>
Mon, 22 Jul 2024 16:53:04 +0000 (10:53 -0600)
Drop all duplicate newlines. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
drivers/clk/clk-uclass.c
drivers/clk/clk_zynqmp.c
drivers/clk/imx/clk-imxrt1170.c
drivers/clk/imx/clk-pll14xx.c
drivers/clk/qcom/clock-qcom.c
drivers/clk/qcom/clock-qcs404.c
drivers/clk/rockchip/clk_rk3328.c

index 4c832f1..c48a62b 100644 (file)
@@ -130,7 +130,6 @@ static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
                return log_ret(ret);
        }
 
-
        return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
                                     index, clk);
 }
index 5999926..97f3b99 100644 (file)
@@ -109,7 +109,6 @@ static const resource_size_t zynqmp_crl_apb_clkc_base = 0xff5e0020;
 #define PLLCTRL_PRE_SRC_SHFT   20
 #define PLLCTRL_PRE_SRC_MASK   (0x7 << PLLCTRL_PRE_SRC_SHFT)
 
-
 #define NUM_MIO_PINS   77
 
 enum zynqmp_clk {
index 20b9dc3..88a294f 100644 (file)
@@ -113,8 +113,6 @@ static int imxrt1170_clk_probe(struct udevice *dev)
        /* Anatop clocks */
        base = (void *)ofnode_get_addr(ofnode_by_compatible(ofnode_null(), "fsl,imxrt-anatop"));
 
-
-
        clk_dm(IMXRT1170_CLK_RCOSC_48M,
               imx_clk_fixed_factor("rcosc48M", "rcosc16M", 3, 1));
        clk_dm(IMXRT1170_CLK_RCOSC_400M,
@@ -122,7 +120,6 @@ static int imxrt1170_clk_probe(struct udevice *dev)
        clk_dm(IMXRT1170_CLK_RCOSC_48M_DIV2,
               imx_clk_fixed_factor("rcosc48M_div2",  "rcosc48M", 1, 2));
 
-
        clk_dm(IMXRT1170_CLK_PLL_ARM,
               imx_clk_pllv3(IMX_PLLV3_SYS, "pll_arm", "osc",
                             base + 0x200, 0xff));
index 3911e03..7ec78dc 100644 (file)
@@ -248,7 +248,6 @@ static ulong clk_pll1416x_set_rate(struct clk *clk, unsigned long drate)
        tmp |= BYPASS_MASK;
        writel(tmp, pll->base);
 
-
        div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) |
                (rate->sdiv << SDIV_SHIFT);
        writel(div_val, pll->base + 0x4);
index 3a9cf2a..79c7606 100644 (file)
@@ -376,7 +376,6 @@ static int qcom_power_set(struct power_domain *pwr, bool on)
                                         !(value & GDSC_PWR_ON_MASK),
                                         GDSC_STATUS_POLL_TIMEOUT_US);
 
-
        if (ret == -ETIMEDOUT)
                printf("WARNING: GDSC %lu is stuck during power on/off\n",
                       pwr->id);
index 70a1f64..8b11de0 100644 (file)
@@ -67,7 +67,6 @@
 #define EMAC_PTP_CMD_RCGR              (0x4e014)
 #define EMAC_CMD_RCGR                  (0x4e01c)
 
-
 /* GPLL0 clock control registers */
 #define GPLL0_STATUS_ACTIVE BIT(31)
 
index a4f6dd5..9137dbe 100644 (file)
@@ -334,7 +334,6 @@ void rk3328_configure_cpu(struct rk3328_cru *cru,
                     aclkm_div << ACLKM_CORE_DIV_SHIFT);
 }
 
-
 static ulong rk3328_i2c_get_clk(struct rk3328_cru *cru, ulong clk_id)
 {
        u32 div, con;