Load and entry addresses are corrected for Agilex5 SoCFPGA board
which would enable to generate the kernel itb file with the right
addresses.
Signed-off-by: Naresh Kumar Ravulapalli <nareshkumar.ravulapalli@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
arch = "arm64";
os = "linux";
compression = "none";
+ #if IS_ENABLED(CONFIG_TARGET_SOCFPGA_AGILEX5)
+ load = <0x86000000>;
+ entry = <0x86000000>;
+ #else
load = <0x6000000>;
entry = <0x6000000>;
+ #endif
kernel_blob: blob-ext {
filename = "Image";
};