m68k: add dspi chip-select support

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Changes for v5:
- new patch

diff --git a/arch/m68k/cpu/mcf5227x/Makefile b/arch/m68k/cpu/mcf5227x/Makefile
index ef43893..6a38c48 100644 (file)
--- a/arch/m68k/cpu/mcf5227x/Makefile
+++ b/arch/m68k/cpu/mcf5227x/Makefile
@@ -6,4 +6,4 @@
 # ccflags-y += -DET_DEBUG
 
 extra-y        = start.o
-obj-y  = cpu.o speed.o cpu_init.o interrupts.o
+obj-y  = cpu.o speed.o cpu_init.o interrupts.o dspi.o

diff --git a/arch/m68k/cpu/mcf5227x/dspi.c b/arch/m68k/cpu/mcf5227x/dspi.c
new file mode 100644 (file)
index 0000000..8fc4da2
--- /dev/null
+++ b/arch/m68k/cpu/mcf5227x/dspi.c
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019
+ * Angelo Dureghello <angleo@sysam.it>
+ *
+ * CPU specific dspi routines
+ */
+
+#include <common.h>
+#include <asm/immap.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_CF_DSPI
+void dspi_chip_select(int cs)
+{
+       struct gpio *gpio = (struct gpio *)MMAP_GPIO;
+
+       switch (cs) {
+       case 0:
+               clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_UNMASK);
+               setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
+               break;
+       case 2:
+               clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
+               setbits_8(&gpio->par_timer, GPIO_PAR_TIMER_T2IN_DSPIPCS2);
+               break;
+       }
+}
+
+void dspi_chip_unselect(int cs)
+{
+       struct gpio *gpio = (struct gpio *)MMAP_GPIO;
+
+       switch (cs) {
+       case 0:
+               clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
+               break;
+       case 2:
+               clrbits_8(&gpio->par_timer, ~GPIO_PAR_TIMER_T2IN_UNMASK);
+               break;
+       }
+}
+#endif /* CONFIG_CF_DSPI */

diff --git a/arch/m68k/cpu/mcf5227x/start.S b/arch/m68k/cpu/mcf5227x/start.S
index e1b6c35..61f9c68 100644 (file)
--- a/arch/m68k/cpu/mcf5227x/start.S
+++ b/arch/m68k/cpu/mcf5227x/start.S
@@ -378,7 +378,8 @@ _start:
        clr.l   %sp@-
 
        /* run low-level board init code (from flash) */
-       bsr     board_init_f
+       move.l  #board_init_f, %a1
+       jsr     (%a1)
 
        /* board_init_f() does not return */
 

diff --git a/arch/m68k/cpu/mcf5445x/Makefile b/arch/m68k/cpu/mcf5445x/Makefile
index be2cb2a..ba90fc3 100644 (file)
--- a/arch/m68k/cpu/mcf5445x/Makefile
+++ b/arch/m68k/cpu/mcf5445x/Makefile
@@ -6,4 +6,4 @@
 # ccflags-y += -DET_DEBUG
 
 extra-y        = start.o
-obj-y  = cpu.o speed.o cpu_init.o interrupts.o pci.o
+obj-y  = cpu.o speed.o cpu_init.o interrupts.o pci.o dspi.o

diff --git a/arch/m68k/cpu/mcf5445x/dspi.c b/arch/m68k/cpu/mcf5445x/dspi.c
new file mode 100644 (file)
index 0000000..b0e2f2c
--- /dev/null
+++ b/arch/m68k/cpu/mcf5445x/dspi.c
@@ -0,0 +1,88 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2019
+ * Angelo Dureghello <angleo@sysam.it>
+ *
+ * CPU specific dspi routines
+ */
+
+#include <common.h>
+#include <asm/immap.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_CF_DSPI
+void dspi_chip_select(int cs)
+{
+       struct gpio *gpio = (struct gpio *)MMAP_GPIO;
+
+#ifdef CONFIG_MCF5445x
+       switch (cs) {
+       case 0:
+               clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
+               setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
+               break;
+       case 1:
+               clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
+               setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
+               break;
+       case 2:
+               clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
+               setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
+               break;
+       case 3:
+               clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK);
+               setbits_8(&gpio->par_dma, GPIO_PAR_DMA_DACK0_PCS3);
+               break;
+       case 5:
+               clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
+               setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
+               break;
+       }
+#endif
+#ifdef CONFIG_MCF5441x
+       switch (cs) {
+       case 0:
+               clrbits_8(&gpio->par_dspi0,
+                         ~GPIO_PAR_DSPI0_PCS0_MASK);
+               setbits_8(&gpio->par_dspi0,
+                         GPIO_PAR_DSPI0_PCS0_DSPI0PCS0);
+               break;
+       case 1:
+               clrbits_8(&gpio->par_dspiow,
+                         GPIO_PAR_DSPIOW_DSPI0PSC1);
+               setbits_8(&gpio->par_dspiow,
+                         GPIO_PAR_DSPIOW_DSPI0PSC1);
+               break;
+       }
+#endif
+}
+
+void dspi_chip_unselect(int cs)
+{
+       struct gpio *gpio = (struct gpio *)MMAP_GPIO;
+
+#ifdef CONFIG_MCF5445x
+       switch (cs) {
+       case 0:
+               clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0);
+               break;
+       case 1:
+               clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1);
+               break;
+       case 2:
+               clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2);
+               break;
+       case 3:
+               clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK);
+               break;
+       case 5:
+               clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5);
+               break;
+       }
+#endif
+#ifdef CONFIG_MCF5441x
+       if (cs == 1)
+               clrbits_8(&gpio->par_dspiow, GPIO_PAR_DSPIOW_DSPI0PSC1);
+#endif
+}
+#endif /* CONFIG_CF_DSPI */

diff --git a/arch/m68k/include/asm/coldfire/dspi.h b/arch/m68k/include/asm/coldfire/dspi.h
index afd5c79..ddd8f33 100644 (file)
--- a/arch/m68k/include/asm/coldfire/dspi.h
+++ b/arch/m68k/include/asm/coldfire/dspi.h
@@ -138,4 +138,8 @@ typedef struct dspi {
 /* Bit definitions and macros for DRFDR group */
 #define DSPI_RFDR_RXDATA(x)            (((x)&0x0000FFFF))
 
+/* Architecture-related operations */
+void dspi_chip_select(int cs);
+void dspi_chip_unselect(int cs);
+
 #endif                         /* __DSPI_H__ */