spi: airoha: en7523: workaround flash damaging if UART_TXD was short to GND

We found that some serial console may pull TX line to GROUND during board
boot time. Airoha uses TX line as one of it's BOOT pins. This will lead
to booting in RESERVED boot mode.

It was found that some flashes operates incorrectly in RESERVED mode.
Micron and Skyhigh flashes are definitely affected by the issue,
Winbond flashes are NOT affected.

Details:
--------
DMA reading of odd pages on affected flashes operates incorrectly. Page
reading offset (start of the page) on hardware level is replaced by 0x10.
Thus results in incorrect data reading. Usage of UBI make things even
worse. Any attempt to access UBI leads to ubi damaging. As result OS loading
becomes impossible.

Non-DMA reading is OK.

This patch detects booting in reserved mode, turn off DMA and print big
fat warning.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>

diff --git a/drivers/spi/airoha_snfi_spi.c b/drivers/spi/airoha_snfi_spi.c
index 7d6af69..769ec95 100644 (file)
--- a/drivers/spi/airoha_snfi_spi.c
+++ b/drivers/spi/airoha_snfi_spi.c
@@ -219,6 +219,7 @@ struct airoha_snand_priv {
        struct clk *spi_clk;
 
        u8 *txrx_buf;
+       int dma;
 };
 
 static int airoha_snand_set_fifo_op(struct airoha_snand_priv *priv,
@@ -562,6 +563,20 @@ static ssize_t airoha_snand_dirmap_read(struct spi_mem_dirmap_desc *desc,
        size_t bytes;
        int err;
 
+       if (!priv->dma) {
+               /* simplified version of spi_mem_no_dirmap_read() */
+               struct spi_mem_op op = desc->info.op_tmpl;
+
+               op.addr.val = desc->info.offset + offs;
+               op.data.buf.in = buf;
+               op.data.nbytes = len;
+               err = spi_mem_exec_op(desc->slave, &op);
+               if (err)
+                       return err;
+
+               return op.data.nbytes;
+       }
+
        /* minimum oob size is 64 */
        bytes = round_up(offs + len, 64);
 
@@ -750,6 +765,20 @@ static ssize_t airoha_snand_dirmap_write(struct spi_mem_dirmap_desc *desc,
        size_t bytes;
        int err;
 
+       if (!priv->dma) {
+               /* simplified version of spi_mem_no_dirmap_write() */
+               struct spi_mem_op op = desc->info.op_tmpl;
+
+               op.addr.val = desc->info.offset + offs;
+               op.data.buf.out = buf;
+               op.data.nbytes = len;
+               err = spi_mem_exec_op(desc->slave, &op);
+               if (err)
+                       return err;
+
+               return op.data.nbytes;
+       }
+
        /* minimum oob size is 64 */
        bytes = round_up(offs + len, 64);
 
@@ -998,6 +1027,7 @@ static int airoha_snand_probe(struct udevice *dev)
 {
        struct airoha_snand_priv *priv = dev_get_priv(dev);
        int ret;
+       u32 sfc_strap;
 
        priv->txrx_buf = memalign(ARCH_DMA_MINALIGN, SPI_NAND_CACHE_SIZE);
        if (!priv->txrx_buf) {
@@ -1024,6 +1054,25 @@ static int airoha_snand_probe(struct udevice *dev)
        }
        clk_enable(priv->spi_clk);
 
+       priv->dma = 1;
+       if (device_is_compatible(dev, "airoha,en7523-snand")){
+               ret = regmap_read(priv->regmap_ctrl, REG_SPI_CTRL_SFC_STRAP, &sfc_strap);
+               if (ret)
+                       return ret;
+
+               if (!(sfc_strap & 0x04)) {
+                       priv->dma = 0;
+                       printf("\n"
+                               "=== WARNING ======================================================\n"
+                               "Detected booting in RESERVED mode (UART_TXD was short to GND).\n"
+                               "This mode is known for incorrect DMA reading of some flashes.\n"
+                               "Usage of DMA for flash operations will be disabled to prevent data\n"
+                               "damage. Unplug your serial console and power cycle the board\n"
+                               "to boot with full performance.\n"
+                               "==================================================================\n\n");
+               }
+       }
+
        return airoha_snand_nfi_init(priv);
 }