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clk: exynos5250: register display block gate clocks to common clock framework
authorLeela Krishna Amudala <l.krishna@samsung.com>
Thu, 4 Apr 2013 06:44:40 +0000 (15:44 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Thu, 4 Apr 2013 06:51:23 +0000 (15:51 +0900)
Add gate clocks for fimd, mie, dsim, dp, mixer and hdmi.
Register it to common clock framework.

Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

No differences found
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