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clk: at91: fix div by zero in USB clock driver
authorBoris BREZILLON <boris.brezillon@free-electrons.com>
Tue, 2 Sep 2014 07:50:18 +0000 (09:50 +0200)
committerMike Turquette <mturquette@linaro.org>
Tue, 2 Sep 2014 22:37:26 +0000 (15:37 -0700)
Test rate value before calculating the div value to avoid div by zero.

Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Reported-by: Gaël PORTAY <gael.portay@gmail.com>
Tested-by: Gaël PORTAY <gael.portay@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>

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