ath9k_hw: fix pll clock setting for 5ghz on AR9003
authorFelix Fietkau <nbd@openwrt.org>
Mon, 26 Apr 2010 19:04:30 +0000 (15:04 -0400)
committerJohn W. Linville <linville@tuxdriver.com>
Tue, 27 Apr 2010 20:09:16 +0000 (16:09 -0400)
Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

No differences found