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crypto: sha-mb - SHA1 multibuffer crypto computation (x8 AVX2)
authorTim Chen <tim.c.chen@linux.intel.com>
Thu, 31 Jul 2014 17:30:00 +0000 (10:30 -0700)
committerHerbert Xu <herbert@gondor.apana.org.au>
Mon, 25 Aug 2014 12:32:29 +0000 (20:32 +0800)
This patch introduces the assembly routines to do SHA1 computation on
buffers belonging to serveral jobs at once.  The assembly routines are
optimized with AVX2 instructions that have 8 data lanes and using AVX2
registers.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

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