crypto: aesni-intel - Add AES-NI accelerated CTR mode
authorHuang Ying <ying.huang@intel.com>
Wed, 10 Mar 2010 10:28:55 +0000 (18:28 +0800)
committerHerbert Xu <herbert@gondor.apana.org.au>
Wed, 10 Mar 2010 10:28:55 +0000 (18:28 +0800)
To take advantage of the hardware pipeline implementation of AES-NI
instructions. CTR mode cryption is implemented in ASM to schedule
multiple AES-NI instructions one after another. This way, some latency
of AES-NI instruction can be eliminated.

Performance testing based on dm-crypt should 50% reduction of
ecryption/decryption time.

Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

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