function = "spi";
groups = "spi0", "spi0_wp_hold";
};
+
+ conf-pu {
+ pins = "SPI0_CSB", "SPI0_HOLD", "SPI0_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+
+ conf-pd {
+ pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
+
};
spi2_pins: spi2-pins {
function = "spi";
groups = "spi2", "spi2_wp_hold";
};
+
+ conf-pu {
+ pins = "SPI2_CSB", "SPI2_HOLD", "SPI2_WP";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
+ };
+
+ conf-pd {
+ pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
+ };
};
mmc0_pins_default: mmc0default {
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
+ drive-strength = <MTK_DRIVE_4mA>;
+ mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
+ drive-strength = <MTK_DRIVE_6mA>;
+ mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-dsl {
pins = "EMMC_DSL";
+ mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
+ drive-strength = <MTK_DRIVE_4mA>;
+ mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
};
};