dmaengine: ste_dma40: reset priority bit for logical channels
authorNarayanan <narayanan.gopalakrishnan@stericsson.com>
Tue, 13 Sep 2011 11:30:22 +0000 (17:00 +0530)
committerFabio Baltieri <fabio.baltieri@linaro.org>
Mon, 14 Jan 2013 09:50:09 +0000 (10:50 +0100)
This patch sets the SSCFG/SDCFG bit[7] PRI only for physical channel
requests with high priority.  For logical channels, this bit will be
zero.

Signed-off-by: Narayanan G <narayanan.gopalakrishnan@stericsson.com>
Reviewed-by: Rabin Vincent <rabin.vincent@stericsson.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>

No differences found