global: Move remaining CONFIG_SYS_NOR_* to CFG_SYS_NOR_*
authorTom Rini <trini@konsulko.com>
Wed, 16 Nov 2022 18:10:25 +0000 (13:10 -0500)
committerTom Rini <trini@konsulko.com>
Mon, 5 Dec 2022 21:05:38 +0000 (16:05 -0500)
The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NOR
namespace do not easily transition to Kconfig. In many cases they likely
should come from the device tree instead. Move these out of CONFIG
namespace and in to CFG namespace.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
21 files changed:
board/freescale/ls1043aqds/ls1043aqds.c
board/freescale/ls1043ardb/ls1043ardb.c
board/freescale/ls1046aqds/ls1046aqds.c
board/freescale/ls1088a/ls1088a.c
include/configs/P1010RDB.h
include/configs/T102xRDB.h
include/configs/T104xRDB.h
include/configs/T208xQDS.h
include/configs/T208xRDB.h
include/configs/T4240RDB.h
include/configs/km/pg-wcom-ls102xa.h
include/configs/kmcent2.h
include/configs/ls1021aqds.h
include/configs/ls1021atwr.h
include/configs/ls1043aqds.h
include/configs/ls1043ardb.h
include/configs/ls1046aqds.h
include/configs/ls1088aqds.h
include/configs/ls1088ardb.h
include/configs/ls2080aqds.h
include/configs/ls2080ardb.h

index 481d3a5..5fe40c4 100644 (file)
@@ -59,13 +59,13 @@ struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
                "nor0",
                CONFIG_SYS_NOR0_CSPR,
                CONFIG_SYS_NOR0_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
 
        },
@@ -73,13 +73,13 @@ struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
                "nor1",
                CONFIG_SYS_NOR1_CSPR,
                CONFIG_SYS_NOR1_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
        },
        {
@@ -128,26 +128,26 @@ struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
                "nor0",
                CONFIG_SYS_NOR0_CSPR,
                CONFIG_SYS_NOR0_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
        },
        {
                "nor1",
                CONFIG_SYS_NOR1_CSPR,
                CONFIG_SYS_NOR1_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
        },
        {
index 7f32128..a8a7263 100644 (file)
@@ -33,15 +33,15 @@ DECLARE_GLOBAL_DATA_PTR;
 struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
        {
                "nor",
-               CONFIG_SYS_NOR_CSPR,
-               CONFIG_SYS_NOR_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_CSPR,
+               CFG_SYS_NOR_CSPR_EXT,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
 
        },
@@ -89,15 +89,15 @@ struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
        },
        {
                "nor",
-               CONFIG_SYS_NOR_CSPR,
-               CONFIG_SYS_NOR_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_CSPR,
+               CFG_SYS_NOR_CSPR_EXT,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
        },
        {
index de68286..97d71db 100644 (file)
@@ -43,13 +43,13 @@ struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
                "nor0",
                CONFIG_SYS_NOR0_CSPR,
                CONFIG_SYS_NOR0_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
 
        },
@@ -57,13 +57,13 @@ struct ifc_regs ifc_cfg_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
                "nor1",
                CONFIG_SYS_NOR1_CSPR,
                CONFIG_SYS_NOR1_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
        },
        {
@@ -112,26 +112,26 @@ struct ifc_regs ifc_cfg_nand_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
                "nor0",
                CONFIG_SYS_NOR0_CSPR,
                CONFIG_SYS_NOR0_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
        },
        {
                "nor1",
                CONFIG_SYS_NOR1_CSPR,
                CONFIG_SYS_NOR1_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
        },
        {
index b70c198..ff3abc8 100644 (file)
@@ -43,13 +43,13 @@ struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
                "nor0",
                CONFIG_SYS_NOR0_CSPR_EARLY,
                CONFIG_SYS_NOR0_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
                0,
                CONFIG_SYS_NOR0_CSPR,
@@ -59,17 +59,17 @@ struct ifc_regs ifc_cfg_ifc_nor_boot[CONFIG_SYS_FSL_IFC_BANK_COUNT] = {
                "nor1",
                CONFIG_SYS_NOR1_CSPR_EARLY,
                CONFIG_SYS_NOR0_CSPR_EXT,
-               CONFIG_SYS_NOR_AMASK_EARLY,
-               CONFIG_SYS_NOR_CSOR,
+               CFG_SYS_NOR_AMASK_EARLY,
+               CFG_SYS_NOR_CSOR,
                {
-                       CONFIG_SYS_NOR_FTIM0,
-                       CONFIG_SYS_NOR_FTIM1,
-                       CONFIG_SYS_NOR_FTIM2,
-                       CONFIG_SYS_NOR_FTIM3
+                       CFG_SYS_NOR_FTIM0,
+                       CFG_SYS_NOR_FTIM1,
+                       CFG_SYS_NOR_FTIM2,
+                       CFG_SYS_NOR_FTIM3
                },
                0,
                CONFIG_SYS_NOR1_CSPR,
-               CONFIG_SYS_NOR_AMASK,
+               CFG_SYS_NOR_AMASK,
        },
        {
                "nand",
index 3288969..154bf58 100644 (file)
@@ -144,22 +144,22 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_FLASH_BASE_PHYS     CONFIG_SYS_FLASH_BASE
 #endif
 
-#define CONFIG_SYS_NOR_CSPR    (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \
+#define CFG_SYS_NOR_CSPR       (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | \
                                CSPR_PORT_SIZE_16 | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK   IFC_AMASK(32*1024*1024)
-#define CONFIG_SYS_NOR_CSOR    CSOR_NOR_ADM_SHIFT(7)
+#define CFG_SYS_NOR_AMASK      IFC_AMASK(32*1024*1024)
+#define CFG_SYS_NOR_CSOR       CSOR_NOR_ADM_SHIFT(7)
 /* NOR Flash Timing Params */
-#define CONFIG_SYS_NOR_FTIM0   FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_FTIM0      FTIM0_NOR_TACSE(0x4) | \
                                FTIM0_NOR_TEADC(0x5) | \
                                FTIM0_NOR_TEAHC(0x5)
-#define CONFIG_SYS_NOR_FTIM1   FTIM1_NOR_TACO(0x1e) | \
+#define CFG_SYS_NOR_FTIM1      FTIM1_NOR_TACO(0x1e) | \
                                FTIM1_NOR_TRAD_NOR(0x0f)
-#define CONFIG_SYS_NOR_FTIM2   FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2      FTIM2_NOR_TCS(0x4) | \
                                FTIM2_NOR_TCH(0x4) | \
                                FTIM2_NOR_TWP(0x1c)
-#define CONFIG_SYS_NOR_FTIM3   0x0
+#define CFG_SYS_NOR_FTIM3      0x0
 
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS}
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
@@ -244,21 +244,21 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NAND_FTIM1
 #define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NAND_FTIM3
-#define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR1               CFG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #else
-#define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR0               CFG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK1              CFG_SYS_NAND_AMASK
 #define CONFIG_SYS_CSOR1               CFG_SYS_NAND_CSOR
index 6eaa414..978cc67 100644 (file)
                                CSPR_PORT_SIZE_16 | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK   IFC_AMASK(128*1024*1024)
+#define CFG_SYS_NOR_AMASK      IFC_AMASK(128*1024*1024)
 
 /* NOR Flash Timing Params */
 #if defined(CONFIG_TARGET_T1024RDB)
-#define CONFIG_SYS_NOR_CSOR    CSOR_NAND_TRHZ_80
+#define CFG_SYS_NOR_CSOR       CSOR_NAND_TRHZ_80
 #elif defined(CONFIG_TARGET_T1023RDB)
-#define CONFIG_SYS_NOR_CSOR    (CSOR_NOR_ADM_SHIFT(0) | \
+#define CFG_SYS_NOR_CSOR    (CSOR_NOR_ADM_SHIFT(0) | \
                                CSOR_NAND_TRHZ_80 | CSOR_NOR_ADM_SHFT_MODE_EN)
 #endif
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_FTIM0      (FTIM0_NOR_TACSE(0x4) | \
                                FTIM0_NOR_TEADC(0x5) | \
                                FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1      (FTIM1_NOR_TACO(0x35) | \
                                FTIM1_NOR_TRAD_NOR(0x1A) |\
                                FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2      (FTIM2_NOR_TCS(0x4) | \
                                FTIM2_NOR_TCH(0x4) | \
                                FTIM2_NOR_TWPH(0x0E) | \
                                FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3   0x0
+#define CFG_SYS_NOR_FTIM3      0x0
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
 #define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NAND_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #else
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK1              CFG_SYS_NAND_AMASK
index a9e6cfa..f26e9d6 100644 (file)
 #define CONFIG_SYS_FLASH_BASE  0xe8000000
 #define CONFIG_SYS_FLASH_BASE_PHYS     (0xf00000000ull | CONFIG_SYS_FLASH_BASE)
 
-#define CONFIG_SYS_NOR_CSPR_EXT        (0xf)
-#define CONFIG_SYS_NOR_CSPR    (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE) | \
+#define CFG_SYS_NOR_CSPR_EXT   (0xf)
+#define CFG_SYS_NOR_CSPR       (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE) | \
                                CSPR_PORT_SIZE_16 | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK   IFC_AMASK(128*1024*1024)
+#define CFG_SYS_NOR_AMASK      IFC_AMASK(128*1024*1024)
 
 /*
  * TDM Definition
 #define T1040_TDM_QUIRK_CCSR_BASE      0xfe000000
 
 /* NOR Flash Timing Params */
-#define CONFIG_SYS_NOR_CSOR    CSOR_NAND_TRHZ_80
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_CSOR       CSOR_NAND_TRHZ_80
+#define CFG_SYS_NOR_FTIM0      (FTIM0_NOR_TACSE(0x4) | \
                                FTIM0_NOR_TEADC(0x5) | \
                                FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1      (FTIM1_NOR_TACO(0x35) | \
                                FTIM1_NOR_TRAD_NOR(0x1A) |\
                                FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2      (FTIM2_NOR_TCS(0x4) | \
                                FTIM2_NOR_TCH(0x4) | \
                                FTIM2_NOR_TWPH(0x0E) | \
                                FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3   0x0
+#define CFG_SYS_NOR_FTIM3      0x0
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
 #define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NAND_FTIM1
 #define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NAND_FTIM3
-#define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR_CSPR_EXT
-#define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR1_EXT           CFG_SYS_NOR_CSPR_EXT
+#define CONFIG_SYS_CSPR1               CFG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #else
-#define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR_CSPR_EXT
-#define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR0_EXT           CFG_SYS_NOR_CSPR_EXT
+#define CONFIG_SYS_CSPR0               CFG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK1              CFG_SYS_NAND_AMASK
index 47f4990..62f0710 100644 (file)
                                CSPR_PORT_SIZE_16 | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK   IFC_AMASK(128*1024*1024)
+#define CFG_SYS_NOR_AMASK      IFC_AMASK(128*1024*1024)
 /* NOR Flash Timing Params */
-#define CONFIG_SYS_NOR_CSOR    CSOR_NAND_TRHZ_80
+#define CFG_SYS_NOR_CSOR       CSOR_NAND_TRHZ_80
 
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_FTIM0      (FTIM0_NOR_TACSE(0x4) | \
                                FTIM0_NOR_TEADC(0x5) | \
                                FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1      (FTIM1_NOR_TACO(0x35) | \
                                FTIM1_NOR_TRAD_NOR(0x1A) |\
                                FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2      (FTIM2_NOR_TCS(0x4) | \
                                FTIM2_NOR_TCH(0x4) | \
                                FTIM2_NOR_TWPH(0x0E) | \
                                FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3   0x0
+#define CFG_SYS_NOR_FTIM3      0x0
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
 #define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NAND_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK2              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR2               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS2_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS2_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK2              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR2               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS2_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS2_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS2_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS2_FTIM3           CFG_SYS_NOR_FTIM3
 #else
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK2              CFG_SYS_NAND_AMASK
index 111f2e6..0616f8a 100644 (file)
                                CSPR_PORT_SIZE_16 | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK   IFC_AMASK(128*1024*1024)
+#define CFG_SYS_NOR_AMASK      IFC_AMASK(128*1024*1024)
 
 /* NOR Flash Timing Params */
-#define CONFIG_SYS_NOR_CSOR    CSOR_NAND_TRHZ_80
+#define CFG_SYS_NOR_CSOR       CSOR_NAND_TRHZ_80
 
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_FTIM0      (FTIM0_NOR_TACSE(0x4) | \
                                FTIM0_NOR_TEADC(0x5) | \
                                FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1      (FTIM1_NOR_TACO(0x35) | \
                                FTIM1_NOR_TRAD_NOR(0x1A) |\
                                FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2      (FTIM2_NOR_TCS(0x4) | \
                                FTIM2_NOR_TCH(0x4) | \
                                FTIM2_NOR_TWPH(0x0E) | \
                                FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3   0x0
+#define CFG_SYS_NOR_FTIM3      0x0
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
 #define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NAND_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #else
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK1              CFG_SYS_NAND_AMASK
index b823298..2eb4e73 100644 (file)
                                CSPR_PORT_SIZE_16 | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK   IFC_AMASK(128*1024*1024)
+#define CFG_SYS_NOR_AMASK      IFC_AMASK(128*1024*1024)
 /* NOR Flash Timing Params */
-#define CONFIG_SYS_NOR_CSOR    CSOR_NAND_TRHZ_80
+#define CFG_SYS_NOR_CSOR       CSOR_NAND_TRHZ_80
 
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_FTIM0      (FTIM0_NOR_TACSE(0x4) | \
                                FTIM0_NOR_TEADC(0x5) | \
                                FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1      (FTIM1_NOR_TACO(0x35) | \
                                FTIM1_NOR_TRAD_NOR(0x1A) |\
                                FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2      (FTIM2_NOR_TCS(0x4) | \
                                FTIM2_NOR_TCH(0x4) | \
                                FTIM2_NOR_TWPH(0x0E) | \
                                FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3   0x0
+#define CFG_SYS_NOR_FTIM3      0x0
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45 /* count down from 45/5: 9..1 */
 
 #define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NAND_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK2              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR2               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS2_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS2_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK2              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR2               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS2_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS2_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS2_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS2_FTIM3           CFG_SYS_NOR_FTIM3
 #else
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK1              CFG_SYS_NAND_AMASK
 #endif
 #define CONFIG_SYS_CSPR2_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK2              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR2               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS2_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS2_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK2              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR2               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS2_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS2_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS2_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS2_FTIM3           CFG_SYS_NOR_FTIM3
 
 /* CPLD on IFC */
 #define CONFIG_SYS_CPLD_BASE   0xffdf0000
index d883b18..cc8c37e 100644 (file)
                                CSPR_TE | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK           IFC_AMASK(64 * 1024 * 1024)
+#define CFG_SYS_NOR_AMASK              IFC_AMASK(64 * 1024 * 1024)
 
-#define CONFIG_SYS_NOR_CSOR            (CSOR_NOR_AVD_TGL_PGM_EN | \
+#define CFG_SYS_NOR_CSOR               (CSOR_NOR_AVD_TGL_PGM_EN | \
                                        CSOR_NOR_ADM_SHIFT(0x4) | \
                                        CSOR_NOR_NOR_MODE_ASYNC_NOR | \
                                        CSOR_NOR_TRHZ_20 | \
                                        CSOR_NOR_BCTLD)
-#define CONFIG_SYS_NOR_FTIM0           (FTIM0_NOR_TACSE(0x1) | \
+#define CFG_SYS_NOR_FTIM0              (FTIM0_NOR_TACSE(0x1) | \
                                        FTIM0_NOR_TEADC(0x7) | \
                                        FTIM0_NOR_TAVDS(0x0) | \
                                        FTIM0_NOR_TEAHC(0x1))
-#define CONFIG_SYS_NOR_FTIM1           (FTIM1_NOR_TACO(0x1) | \
+#define CFG_SYS_NOR_FTIM1              (FTIM1_NOR_TACO(0x1) | \
                                        FTIM1_NOR_TRAD_NOR(0x21) | \
                                        FTIM1_NOR_TSEQRAD_NOR(0x21))
-#define CONFIG_SYS_NOR_FTIM2           (FTIM2_NOR_TCS(0x1) | \
+#define CFG_SYS_NOR_FTIM2              (FTIM2_NOR_TCS(0x1) | \
                                        FTIM2_NOR_TCH(0x1) | \
                                        FTIM2_NOR_TWPH(0x6) | \
                                        FTIM2_NOR_TWP(0xb))
-#define CONFIG_SYS_NOR_FTIM3           0
+#define CFG_SYS_NOR_FTIM3              0
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
 
 
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 
 /* NAND Flash Definitions */
 #define CFG_SYS_NAND_BASE              0x68000000
index 51ee686..16fd6d5 100644 (file)
 #define CONFIG_SYS_FLASH_BASE_PHYS     (0xf00000000ull | \
                                        CONFIG_SYS_FLASH_BASE)
 
-#define CONFIG_SYS_NOR_CSPR_EXT        (0x0f)
-#define CONFIG_SYS_NOR_CSPR    (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE) | \
+#define CFG_SYS_NOR_CSPR_EXT   (0x0f)
+#define CFG_SYS_NOR_CSPR       (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE) | \
                                CSPR_PORT_SIZE_16 | /* Port size = 16 bit */\
                                0x00000010 |        /* drive TE high */\
                                CSPR_MSEL_NOR |     /* MSEL = NOR */\
                                CSPR_V)             /* valid */
-#define CONFIG_SYS_NOR_AMASK   IFC_AMASK(64 * 1024 * 1024) /* 64MB */
-#define CONFIG_SYS_NOR_CSOR    (CSOR_NOR_AVD_TGL_PGM_EN | /* AVD toggle */\
+#define CFG_SYS_NOR_AMASK      IFC_AMASK(64 * 1024 * 1024) /* 64MB */
+#define CFG_SYS_NOR_CSOR       (CSOR_NOR_AVD_TGL_PGM_EN | /* AVD toggle */\
                                CSOR_NOR_TRHZ_20 | \
                                CSOR_NOR_BCTLD)
 
 /* NOR Flash Timing Params */
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x1) | \
+#define CFG_SYS_NOR_FTIM0      (FTIM0_NOR_TACSE(0x1) | \
                                FTIM0_NOR_TEADC(0x7) | \
                                FTIM0_NOR_TEAHC(0x1))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x1) | \
+#define CFG_SYS_NOR_FTIM1      (FTIM1_NOR_TACO(0x1) | \
                                FTIM1_NOR_TRAD_NOR(0x21) | \
                                FTIM1_NOR_TSEQRAD_NOR(0x21))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCH(0x1) | \
+#define CFG_SYS_NOR_FTIM2      (FTIM2_NOR_TCH(0x1) | \
                                FTIM2_NOR_TCS(0x1) | \
                                FTIM2_NOR_TWP(0xb) | \
                                FTIM2_NOR_TWPH(0x6))
-#define CONFIG_SYS_NOR_FTIM3   0x0
-
-#define CONFIG_SYS_CSPR0_EXT   CONFIG_SYS_NOR_CSPR_EXT
-#define CONFIG_SYS_CSPR0       CONFIG_SYS_NOR_CSPR
-#define CONFIG_SYS_AMASK0      CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0       CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0   CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1   CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2   CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3   CONFIG_SYS_NOR_FTIM3
+#define CFG_SYS_NOR_FTIM3      0x0
+
+#define CONFIG_SYS_CSPR0_EXT   CFG_SYS_NOR_CSPR_EXT
+#define CONFIG_SYS_CSPR0       CFG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK0      CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0       CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0   CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1   CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2   CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3   CFG_SYS_NOR_FTIM3
 
 /* More NOR Flash params */
 
index 7d89b53..6b23134 100644 (file)
                                CSPR_PORT_SIZE_16 | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128 * 1024 * 1024)
+#define CFG_SYS_NOR_AMASK              IFC_AMASK(128 * 1024 * 1024)
 
-#define CONFIG_SYS_NOR_CSOR            (CSOR_NOR_ADM_SHIFT(4) | \
+#define CFG_SYS_NOR_CSOR               (CSOR_NOR_ADM_SHIFT(4) | \
                                        CSOR_NOR_TRHZ_80)
-#define CONFIG_SYS_NOR_FTIM0           (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_FTIM0              (FTIM0_NOR_TACSE(0x4) | \
                                        FTIM0_NOR_TEADC(0x5) | \
                                        FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1           (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1              (FTIM1_NOR_TACO(0x35) | \
                                        FTIM1_NOR_TRAD_NOR(0x1a) | \
                                        FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2           (FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2              (FTIM2_NOR_TCS(0x4) | \
                                        FTIM2_NOR_TCH(0x4) | \
                                        FTIM2_NOR_TWPH(0xe) | \
                                        FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3           0
+#define CFG_SYS_NOR_FTIM3              0
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45
 #define CONFIG_SYS_WRITE_SWAPPED_DATA
 #define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NAND_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK2              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR2               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS2_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS2_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK2              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR2               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS2_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS2_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS2_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS2_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR3_EXT           CONFIG_SYS_FPGA_CSPR_EXT
 #define CONFIG_SYS_CSPR3               CONFIG_SYS_FPGA_CSPR
 #define CONFIG_SYS_AMASK3              CONFIG_SYS_FPGA_AMASK
 #else
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK2              CFG_SYS_NAND_AMASK
index 2c96b6f..1ac59a2 100644 (file)
                                CSPR_PORT_SIZE_16 | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128 * 1024 * 1024)
+#define CFG_SYS_NOR_AMASK              IFC_AMASK(128 * 1024 * 1024)
 
 /* NOR Flash Timing Params */
-#define CONFIG_SYS_NOR_CSOR            (CSOR_NOR_ADM_SHIFT(4) | \
+#define CFG_SYS_NOR_CSOR               (CSOR_NOR_ADM_SHIFT(4) | \
                                        CSOR_NOR_TRHZ_80)
-#define CONFIG_SYS_NOR_FTIM0           (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_FTIM0              (FTIM0_NOR_TACSE(0x4) | \
                                        FTIM0_NOR_TEADC(0x5) | \
                                        FTIM0_NOR_TAVDS(0x0) | \
                                        FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1           (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1              (FTIM1_NOR_TACO(0x35) | \
                                        FTIM1_NOR_TRAD_NOR(0x1A) | \
                                        FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2           (FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2              (FTIM2_NOR_TCS(0x4) | \
                                        FTIM2_NOR_TCH(0x4) | \
                                        FTIM2_NOR_TWP(0x1c) | \
                                        FTIM2_NOR_TWPH(0x0e))
-#define CONFIG_SYS_NOR_FTIM3           0
+#define CFG_SYS_NOR_FTIM3              0
 
 #define CONFIG_FLASH_SHOW_PROGRESS     45      /* count down from 45/5: 9..1 */
 
 #define CONFIG_SYS_FPGA_FTIM3           0x0
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_FPGA_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_FPGA_CSPR
 #define CONFIG_SYS_AMASK1              CONFIG_SYS_FPGA_AMASK
index 2126370..3b51cb8 100644 (file)
                                CSPR_PORT_SIZE_16 | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128 * 1024 * 1024)
+#define CFG_SYS_NOR_AMASK              IFC_AMASK(128 * 1024 * 1024)
 
-#define CONFIG_SYS_NOR_CSOR            (CSOR_NOR_ADM_SHIFT(4) | \
+#define CFG_SYS_NOR_CSOR               (CSOR_NOR_ADM_SHIFT(4) | \
                                        CSOR_NOR_TRHZ_80)
-#define CONFIG_SYS_NOR_FTIM0           (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_FTIM0              (FTIM0_NOR_TACSE(0x4) | \
                                        FTIM0_NOR_TEADC(0x5) | \
                                        FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1           (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1              (FTIM1_NOR_TACO(0x35) | \
                                        FTIM1_NOR_TRAD_NOR(0x1a) | \
                                        FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2           (FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2              (FTIM2_NOR_TCS(0x4) | \
                                        FTIM2_NOR_TCH(0x4) | \
                                        FTIM2_NOR_TWPH(0xe) | \
                                        FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3           0
+#define CFG_SYS_NOR_FTIM3              0
 
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS, \
                                        CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
 #ifdef CONFIG_TFABOOT
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK2              CFG_SYS_NAND_AMASK
 #define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NAND_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK2              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR2               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS2_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS2_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK2              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR2               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS2_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS2_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS2_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS2_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR3_EXT           CONFIG_SYS_FPGA_CSPR_EXT
 #define CONFIG_SYS_CSPR3               CONFIG_SYS_FPGA_CSPR
 #define CONFIG_SYS_AMASK3              CONFIG_SYS_FPGA_AMASK
 #else
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK2              CFG_SYS_NAND_AMASK
index 51667f2..76251fd 100644 (file)
 /*
  * NOR Flash Definitions
  */
-#define CONFIG_SYS_NOR_CSPR_EXT                (0x0)
-#define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128*1024*1024)
-#define CONFIG_SYS_NOR_CSPR                                    \
+#define CFG_SYS_NOR_CSPR_EXT           (0x0)
+#define CFG_SYS_NOR_AMASK              IFC_AMASK(128*1024*1024)
+#define CFG_SYS_NOR_CSPR                                       \
        (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS)             | \
        CSPR_PORT_SIZE_16                                       | \
        CSPR_MSEL_NOR                                           | \
        CSPR_V)
 
 /* NOR Flash Timing Params */
-#define CONFIG_SYS_NOR_CSOR            (CSOR_NOR_ADM_SHIFT(4) | \
+#define CFG_SYS_NOR_CSOR               (CSOR_NOR_ADM_SHIFT(4) | \
                                        CSOR_NOR_TRHZ_80)
-#define CONFIG_SYS_NOR_FTIM0           (FTIM0_NOR_TACSE(0x1) | \
+#define CFG_SYS_NOR_FTIM0              (FTIM0_NOR_TACSE(0x1) | \
                                        FTIM0_NOR_TEADC(0x1) | \
                                        FTIM0_NOR_TAVDS(0x0) | \
                                        FTIM0_NOR_TEAHC(0xc))
-#define CONFIG_SYS_NOR_FTIM1           (FTIM1_NOR_TACO(0x1c) | \
+#define CFG_SYS_NOR_FTIM1              (FTIM1_NOR_TACO(0x1c) | \
                                        FTIM1_NOR_TRAD_NOR(0xb) | \
                                        FTIM1_NOR_TSEQRAD_NOR(0x9))
-#define CONFIG_SYS_NOR_FTIM2           (FTIM2_NOR_TCS(0x1) | \
+#define CFG_SYS_NOR_FTIM2              (FTIM2_NOR_TCS(0x1) | \
                                        FTIM2_NOR_TCH(0x4) | \
                                        FTIM2_NOR_TWPH(0x8) | \
                                        FTIM2_NOR_TWP(0x10))
-#define CONFIG_SYS_NOR_FTIM3           0
+#define CFG_SYS_NOR_FTIM3              0
 #define CONFIG_SYS_IFC_CCR             0x01000000
 
 #define CONFIG_SYS_FLASH_BANKS_LIST    { CONFIG_SYS_FLASH_BASE_PHYS }
 
 /* IFC Timing Params */
 #ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR_CSPR_EXT
-#define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR0_EXT           CFG_SYS_NOR_CSPR_EXT
+#define CONFIG_SYS_CSPR0               CFG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 
 #define CONFIG_SYS_CSPR1_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NAND_FTIM2
 #define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NAND_FTIM3
 
-#define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR_CSPR_EXT
-#define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR1_EXT           CFG_SYS_NOR_CSPR_EXT
+#define CONFIG_SYS_CSPR1               CFG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #else
-#define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR_CSPR_EXT
-#define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_CSPR0_EXT           CFG_SYS_NOR_CSPR_EXT
+#define CONFIG_SYS_CSPR0               CFG_SYS_NOR_CSPR
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 
 #define CONFIG_SYS_CSPR1_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CFG_SYS_NAND_CSPR
index d51209c..d565492 100644 (file)
                                CSPR_PORT_SIZE_16 | \
                                CSPR_MSEL_NOR | \
                                CSPR_V)
-#define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128 * 1024 * 1024)
+#define CFG_SYS_NOR_AMASK              IFC_AMASK(128 * 1024 * 1024)
 
-#define CONFIG_SYS_NOR_CSOR            (CSOR_NOR_ADM_SHIFT(4) | \
+#define CFG_SYS_NOR_CSOR               (CSOR_NOR_ADM_SHIFT(4) | \
                                        CSOR_NOR_TRHZ_80)
-#define CONFIG_SYS_NOR_FTIM0           (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_FTIM0              (FTIM0_NOR_TACSE(0x4) | \
                                        FTIM0_NOR_TEADC(0x5) | \
                                        FTIM0_NOR_TAVDS(0x6) | \
                                        FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1           (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1              (FTIM1_NOR_TACO(0x35) | \
                                        FTIM1_NOR_TRAD_NOR(0x1a) | \
                                        FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2           (FTIM2_NOR_TCS(0x8) | \
+#define CFG_SYS_NOR_FTIM2              (FTIM2_NOR_TCS(0x8) | \
                                        FTIM2_NOR_TCH(0x8) | \
                                        FTIM2_NOR_TWPH(0xe) | \
                                        FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3           0
+#define CFG_SYS_NOR_FTIM3              0
 
 #define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE_PHYS, \
                                        CONFIG_SYS_FLASH_BASE_PHYS + 0x8000000}
 #ifdef CONFIG_TFABOOT
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK2              CFG_SYS_NAND_AMASK
 #define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NAND_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK2              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR2               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS2_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS2_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK2              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR2               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS2_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS2_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS2_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS2_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR3_EXT           CONFIG_SYS_FPGA_CSPR_EXT
 #define CONFIG_SYS_CSPR3               CONFIG_SYS_FPGA_CSPR
 #define CONFIG_SYS_AMASK3              CONFIG_SYS_FPGA_AMASK
 #else
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR1_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK2              CFG_SYS_NAND_AMASK
index ae45207..b75d4cc 100644 (file)
@@ -23,8 +23,8 @@
  */
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
-#define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128*1024*1024)
-#define CONFIG_SYS_NOR_AMASK_EARLY     IFC_AMASK(64*1024*1024)
+#define CFG_SYS_NOR_AMASK              IFC_AMASK(128*1024*1024)
+#define CFG_SYS_NOR_AMASK_EARLY        IFC_AMASK(64*1024*1024)
 
 #define CONFIG_SYS_NOR0_CSPR                                   \
        (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS)             | \
        CSPR_PORT_SIZE_16                                       | \
        CSPR_MSEL_NOR                                           | \
        CSPR_V)
-#define CONFIG_SYS_NOR_CSOR    CSOR_NOR_ADM_SHIFT(12)
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_CSOR       CSOR_NOR_ADM_SHIFT(12)
+#define CFG_SYS_NOR_FTIM0      (FTIM0_NOR_TACSE(0x4) | \
                                FTIM0_NOR_TEADC(0x5) | \
                                FTIM0_NOR_TAVDS(0x6) | \
                                FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1      (FTIM1_NOR_TACO(0x35) | \
                                FTIM1_NOR_TRAD_NOR(0x1a) | \
                                FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCS(0x8) | \
+#define CFG_SYS_NOR_FTIM2      (FTIM2_NOR_TCS(0x8) | \
                                FTIM2_NOR_TCH(0x8) | \
                                FTIM2_NOR_TWPH(0xe) | \
                                FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3   0x04000000
+#define CFG_SYS_NOR_FTIM3      0x04000000
 #define CONFIG_SYS_IFC_CCR     0x01000000
 
 #ifndef SYS_NO_FLASH
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR_EARLY
 #define CONFIG_SYS_CSPR0_FINAL         CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR1_CSPR_EARLY
 #define CONFIG_SYS_CSPR1_FINAL         CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK_EARLY
-#define CONFIG_SYS_AMASK1_FINAL                CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK_EARLY
+#define CONFIG_SYS_AMASK1_FINAL                CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK2              CFG_SYS_NAND_AMASK
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR_EARLY
 #define CONFIG_SYS_CSPR0_FINAL         CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR1_CSPR_EARLY
 #define CONFIG_SYS_CSPR1_FINAL         CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK_EARLY
-#define CONFIG_SYS_AMASK1_FINAL                CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK_EARLY
+#define CONFIG_SYS_AMASK1_FINAL                CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK2              CFG_SYS_NAND_AMASK
index 2ca1384..27510ad 100644 (file)
@@ -21,8 +21,8 @@
 
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
-#define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128 * 1024 * 1024)
-#define CONFIG_SYS_NOR_AMASK_EARLY     IFC_AMASK(64 * 1024 * 1024)
+#define CFG_SYS_NOR_AMASK              IFC_AMASK(128 * 1024 * 1024)
+#define CFG_SYS_NOR_AMASK_EARLY        IFC_AMASK(64 * 1024 * 1024)
 
 #define CONFIG_SYS_NOR0_CSPR                                   \
        (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS)             | \
        CSPR_PORT_SIZE_16                                       | \
        CSPR_MSEL_NOR                                           | \
        CSPR_V)
-#define CONFIG_SYS_NOR_CSOR    CSOR_NOR_ADM_SHIFT(6)
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x1) | \
+#define CFG_SYS_NOR_CSOR       CSOR_NOR_ADM_SHIFT(6)
+#define CFG_SYS_NOR_FTIM0      (FTIM0_NOR_TACSE(0x1) | \
                                FTIM0_NOR_TEADC(0x1) | \
                                FTIM0_NOR_TEAHC(0x1))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x1) | \
+#define CFG_SYS_NOR_FTIM1      (FTIM1_NOR_TACO(0x1) | \
                                FTIM1_NOR_TRAD_NOR(0x1))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCS(0x0) | \
+#define CFG_SYS_NOR_FTIM2      (FTIM2_NOR_TCS(0x0) | \
                                FTIM2_NOR_TCH(0x0) | \
                                FTIM2_NOR_TWP(0x1))
-#define CONFIG_SYS_NOR_FTIM3   0x04000000
+#define CFG_SYS_NOR_FTIM3      0x04000000
 #define CONFIG_SYS_IFC_CCR     0x01000000
 
 #ifndef SYS_NO_FLASH
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR_EARLY
 #define CONFIG_SYS_CSPR0_FINAL         CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #endif
 
 #define CONFIG_SYS_LS_MC_BOOT_TIMEOUT_MS 5000
index d9e11cc..7315790 100644 (file)
@@ -26,8 +26,8 @@
 #define SPD_EEPROM_ADDRESS     SPD_EEPROM_ADDRESS1
 
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
-#define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128*1024*1024)
-#define CONFIG_SYS_NOR_AMASK_EARLY     IFC_AMASK(64*1024*1024)
+#define CFG_SYS_NOR_AMASK              IFC_AMASK(128*1024*1024)
+#define CFG_SYS_NOR_AMASK_EARLY        IFC_AMASK(64*1024*1024)
 
 #define CONFIG_SYS_NOR0_CSPR                                   \
        (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS)             | \
        CSPR_PORT_SIZE_16                                       | \
        CSPR_MSEL_NOR                                           | \
        CSPR_V)
-#define CONFIG_SYS_NOR_CSOR    CSOR_NOR_ADM_SHIFT(12)
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_CSOR       CSOR_NOR_ADM_SHIFT(12)
+#define CFG_SYS_NOR_FTIM0      (FTIM0_NOR_TACSE(0x4) | \
                                FTIM0_NOR_TEADC(0x5) | \
                                FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1      (FTIM1_NOR_TACO(0x35) | \
                                FTIM1_NOR_TRAD_NOR(0x1a) |\
                                FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2      (FTIM2_NOR_TCS(0x4) | \
                                FTIM2_NOR_TCH(0x4) | \
                                FTIM2_NOR_TWPH(0x0E) | \
                                FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3   0x04000000
+#define CFG_SYS_NOR_FTIM3      0x04000000
 #define CONFIG_SYS_IFC_CCR     0x01000000
 
 #ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR0_CSPR_EARLY
 #define CONFIG_SYS_CSPR1_FINAL         CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CONFIG_SYS_NOR1_CSPR_EARLY
 #define CONFIG_SYS_CSPR2_FINAL         CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK2              CONFIG_SYS_NOR_AMASK_EARLY
-#define CONFIG_SYS_AMASK2_FINAL                CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR2               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS2_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS2_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK2              CFG_SYS_NOR_AMASK_EARLY
+#define CONFIG_SYS_AMASK2_FINAL                CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR2               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS2_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS2_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS2_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS2_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR0_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK0              CFG_SYS_NAND_AMASK
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR_EARLY
 #define CONFIG_SYS_CSPR0_FINAL         CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR1_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR1               CONFIG_SYS_NOR1_CSPR_EARLY
 #define CONFIG_SYS_CSPR1_FINAL         CONFIG_SYS_NOR1_CSPR
-#define CONFIG_SYS_AMASK1              CONFIG_SYS_NOR_AMASK_EARLY
-#define CONFIG_SYS_AMASK1_FINAL                CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR1               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS1_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS1_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS1_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS1_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK1              CFG_SYS_NOR_AMASK_EARLY
+#define CONFIG_SYS_AMASK1_FINAL                CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR1               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS1_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS1_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS1_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS1_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK2              CFG_SYS_NAND_AMASK
index 086c469..daca3be 100644 (file)
@@ -33,8 +33,8 @@
 #if !defined(CONFIG_FSL_QSPI) || defined(CONFIG_TFABOOT)
 
 #define CONFIG_SYS_NOR0_CSPR_EXT       (0x0)
-#define CONFIG_SYS_NOR_AMASK           IFC_AMASK(128*1024*1024)
-#define CONFIG_SYS_NOR_AMASK_EARLY     IFC_AMASK(64*1024*1024)
+#define CFG_SYS_NOR_AMASK              IFC_AMASK(128*1024*1024)
+#define CFG_SYS_NOR_AMASK_EARLY        IFC_AMASK(64*1024*1024)
 
 #define CONFIG_SYS_NOR0_CSPR                                   \
        (CSPR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS)             | \
        CSPR_PORT_SIZE_16                                       | \
        CSPR_MSEL_NOR                                           | \
        CSPR_V)
-#define CONFIG_SYS_NOR_CSOR    CSOR_NOR_ADM_SHIFT(12)
-#define CONFIG_SYS_NOR_FTIM0   (FTIM0_NOR_TACSE(0x4) | \
+#define CFG_SYS_NOR_CSOR       CSOR_NOR_ADM_SHIFT(12)
+#define CFG_SYS_NOR_FTIM0      (FTIM0_NOR_TACSE(0x4) | \
                                FTIM0_NOR_TEADC(0x5) | \
                                FTIM0_NOR_TEAHC(0x5))
-#define CONFIG_SYS_NOR_FTIM1   (FTIM1_NOR_TACO(0x35) | \
+#define CFG_SYS_NOR_FTIM1      (FTIM1_NOR_TACO(0x35) | \
                                FTIM1_NOR_TRAD_NOR(0x1a) |\
                                FTIM1_NOR_TSEQRAD_NOR(0x13))
-#define CONFIG_SYS_NOR_FTIM2   (FTIM2_NOR_TCS(0x4) | \
+#define CFG_SYS_NOR_FTIM2      (FTIM2_NOR_TCS(0x4) | \
                                FTIM2_NOR_TCH(0x4) | \
                                FTIM2_NOR_TWPH(0x0E) | \
                                FTIM2_NOR_TWP(0x1c))
-#define CONFIG_SYS_NOR_FTIM3   0x04000000
+#define CFG_SYS_NOR_FTIM3      0x04000000
 #define CONFIG_SYS_IFC_CCR     0x01000000
 
 #ifdef CONFIG_MTD_NOR_FLASH
 #define CONFIG_SYS_CSPR2_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CONFIG_SYS_NOR0_CSPR_EARLY
 #define CONFIG_SYS_CSPR2_FINAL         CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK2              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR2               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS2_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS2_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS2_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS2_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK2              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR2               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS2_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS2_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS2_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS2_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR0_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK0              CFG_SYS_NAND_AMASK
 #define CONFIG_SYS_CSPR0_EXT           CONFIG_SYS_NOR0_CSPR_EXT
 #define CONFIG_SYS_CSPR0               CONFIG_SYS_NOR0_CSPR_EARLY
 #define CONFIG_SYS_CSPR0_FINAL         CONFIG_SYS_NOR0_CSPR
-#define CONFIG_SYS_AMASK0              CONFIG_SYS_NOR_AMASK
-#define CONFIG_SYS_CSOR0               CONFIG_SYS_NOR_CSOR
-#define CONFIG_SYS_CS0_FTIM0           CONFIG_SYS_NOR_FTIM0
-#define CONFIG_SYS_CS0_FTIM1           CONFIG_SYS_NOR_FTIM1
-#define CONFIG_SYS_CS0_FTIM2           CONFIG_SYS_NOR_FTIM2
-#define CONFIG_SYS_CS0_FTIM3           CONFIG_SYS_NOR_FTIM3
+#define CONFIG_SYS_AMASK0              CFG_SYS_NOR_AMASK
+#define CONFIG_SYS_CSOR0               CFG_SYS_NOR_CSOR
+#define CONFIG_SYS_CS0_FTIM0           CFG_SYS_NOR_FTIM0
+#define CONFIG_SYS_CS0_FTIM1           CFG_SYS_NOR_FTIM1
+#define CONFIG_SYS_CS0_FTIM2           CFG_SYS_NOR_FTIM2
+#define CONFIG_SYS_CS0_FTIM3           CFG_SYS_NOR_FTIM3
 #define CONFIG_SYS_CSPR2_EXT           CFG_SYS_NAND_CSPR_EXT
 #define CONFIG_SYS_CSPR2               CFG_SYS_NAND_CSPR
 #define CONFIG_SYS_AMASK2              CFG_SYS_NAND_AMASK