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[PATCH] x86_64: On Intel systems when CPU has C3 don't use TSC
authorAndi Kleen <ak@suse.de>
Sat, 29 Jul 2006 19:42:37 +0000 (21:42 +0200)
committerLinus Torvalds <torvalds@g5.osdl.org>
Sun, 30 Jul 2006 03:59:55 +0000 (20:59 -0700)
On Intel systems generally the TSC stops in C3 or deeper,
so don't use it there. Follows similar logic on i386.

This should fix problems on Meroms.

Signed-off-by: Andi Kleen <ak@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

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