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MMC: CSD and CID timeout values
authorMatthew Fleming <matthew.fleming@imgtec.com>
Thu, 2 Oct 2008 11:24:05 +0000 (12:24 +0100)
committerPierre Ossman <drzeus@drzeus.cx>
Sun, 12 Oct 2008 09:04:37 +0000 (11:04 +0200)
The MMC spec states that the timeout for accessing the CSD and CID
registers is 64 clock cycles.

Signed-off-by: Matthew Fleming <matthew.fleming@imgtec.com>
Signed-off-by: Pierre Ossman <drzeus@drzeus.cx>

No differences found
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