ASoC: fsl_spdif: Fix clock source for rxclk rate measurement
authorNicolin Chen <Guangyu.Chen@freescale.com>
Mon, 28 Apr 2014 15:07:51 +0000 (23:07 +0800)
committerMark Brown <broonie@linaro.org>
Tue, 29 Apr 2014 19:07:17 +0000 (12:07 -0700)
The rxclk rate actually uses sysclk, ipg clock for example, as its
reference clock to calculate it. But the driver currently doesn't
pass a correct clock source. So fix it.

Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>

No differences found