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ath9k_hw: Configure pll control register accordingly for AR9340
authorVasanthakumar Thiagarajan <vasanth@atheros.com>
Wed, 20 Apr 2011 04:56:15 +0000 (10:26 +0530)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 25 Apr 2011 18:50:08 +0000 (14:50 -0400)
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

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