[XTENSA] Fix icache flush for cache aliasing
authorChris Zankel <chris@zankel.net>
Tue, 12 Feb 2008 18:11:45 +0000 (10:11 -0800)
committerChris Zankel <chris@zankel.net>
Thu, 14 Feb 2008 01:08:18 +0000 (17:08 -0800)
Set the execution bit in the temporary TLB when we flush the
instruction cache.

Signed-off-by: Chris Zankel <chris@zankel.net>

No differences found