intel_pmc_ipc: Add Intel Apollo Lake PMC IPC driver
authorqipeng.zha <qipeng.zha@intel.com>
Fri, 26 Jun 2015 16:32:15 +0000 (00:32 +0800)
committerDarren Hart <dvhart@linux.intel.com>
Mon, 29 Jun 2015 22:28:14 +0000 (15:28 -0700)
This driver provides support for PMC control on Apollo Lake platforms.
The PMC is an ARC processor which defines some IPC commands for
communication with other entities in the CPU.

Signed-off-by: qipeng.zha <qipeng.zha@intel.com>
[fengguang.wu@intel.com: Fix Sparse and Cocinelle warnings]
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Darren Hart <dvhart@linux.intel.com>
MAINTAINERS
arch/x86/include/asm/intel_pmc_ipc.h [new file with mode: 0644]
drivers/platform/x86/Kconfig
drivers/platform/x86/Makefile
drivers/platform/x86/intel_pmc_ipc.c [new file with mode: 0644]

index 4188e84..3dbdd6d 100644 (file)
@@ -5264,6 +5264,13 @@ F:       include/uapi/linux/mei.h
 F:     drivers/misc/mei/*
 F:     Documentation/misc-devices/mei/*
 
+INTEL PMC IPC DRIVER
+M:     Zha Qipeng<qipeng.zha@intel.com>
+L:     platform-driver-x86@vger.kernel.org
+S:     Maintained
+F:     drivers/platform/x86/intel_pmc_ipc.c
+F:     arch/x86/include/asm/intel_pmc_ipc.h
+
 IOC3 ETHERNET DRIVER
 M:     Ralf Baechle <ralf@linux-mips.org>
 L:     linux-mips@linux-mips.org
diff --git a/arch/x86/include/asm/intel_pmc_ipc.h b/arch/x86/include/asm/intel_pmc_ipc.h
new file mode 100644 (file)
index 0000000..200ec2e
--- /dev/null
@@ -0,0 +1,82 @@
+#ifndef _ASM_X86_INTEL_PMC_IPC_H_
+#define  _ASM_X86_INTEL_PMC_IPC_H_
+
+/* Commands */
+#define PMC_IPC_PMIC_ACCESS            0xFF
+#define                PMC_IPC_PMIC_ACCESS_READ        0x0
+#define                PMC_IPC_PMIC_ACCESS_WRITE       0x1
+#define PMC_IPC_USB_PWR_CTRL           0xF0
+#define PMC_IPC_PMIC_BLACKLIST_SEL     0xEF
+#define PMC_IPC_PHY_CONFIG             0xEE
+#define PMC_IPC_NORTHPEAK_CTRL         0xED
+#define PMC_IPC_PM_DEBUG               0xEC
+#define PMC_IPC_PMC_TELEMTRY           0xEB
+#define PMC_IPC_PMC_FW_MSG_CTRL                0xEA
+
+/* IPC return code */
+#define IPC_ERR_NONE                   0
+#define IPC_ERR_CMD_NOT_SUPPORTED      1
+#define IPC_ERR_CMD_NOT_SERVICED       2
+#define IPC_ERR_UNABLE_TO_SERVICE      3
+#define IPC_ERR_CMD_INVALID            4
+#define IPC_ERR_CMD_FAILED             5
+#define IPC_ERR_EMSECURITY             6
+#define IPC_ERR_UNSIGNEDKERNEL         7
+
+#if IS_ENABLED(CONFIG_INTEL_PMC_IPC)
+
+/*
+ * intel_pmc_ipc_simple_command
+ * @cmd: command
+ * @sub: sub type
+ */
+int intel_pmc_ipc_simple_command(int cmd, int sub);
+
+/*
+ * intel_pmc_ipc_raw_cmd
+ * @cmd: command
+ * @sub: sub type
+ * @in: input data
+ * @inlen: input length in bytes
+ * @out: output data
+ * @outlen: output length in dwords
+ * @sptr: data writing to SPTR register
+ * @dptr: data writing to DPTR register
+ */
+int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen,
+               u32 *out, u32 outlen, u32 dptr, u32 sptr);
+
+/*
+ * intel_pmc_ipc_command
+ * @cmd: command
+ * @sub: sub type
+ * @in: input data
+ * @inlen: input length in bytes
+ * @out: output data
+ * @outlen: output length in dwords
+ */
+int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,
+               u32 *out, u32 outlen);
+
+#else
+
+static inline int intel_pmc_ipc_simple_command(int cmd, int sub)
+{
+       return -EINVAL;
+}
+
+static inline int intel_pmc_ipc_raw_cmd(u32 cmd, u32 sub, u8 *in, u32 inlen,
+               u32 *out, u32 outlen, u32 dptr, u32 sptr)
+{
+       return -EINVAL;
+}
+
+static inline int intel_pmc_ipc_command(u32 cmd, u32 sub, u8 *in, u32 inlen,
+               u32 *out, u32 outlen)
+{
+       return -EINVAL;
+}
+
+#endif /*CONFIG_INTEL_PMC_IPC*/
+
+#endif
Simple merge
Simple merge
Simple merge