--- /dev/null
+--- ixp_osal/os/linux/src/core/IxOsalOsMsgQ.c 2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/src/core/IxOsalOsMsgQ.c 2005-08-24 00:18:02.000000000 +0200
+@@ -45,9 +45,9 @@
+ * -- End Intel Copyright Notice --
+ */
+ #include <linux/linkage.h>
++#include <linux/spinlock.h>
+ #include <linux/ipc.h>
+ #include <linux/msg.h>
+-#include <linux/spinlock.h>
+ #include <linux/interrupt.h>
+
+ #include "IxOsal.h"
+--- ixp_osal/os/linux/src/core/IxOsalOsSemaphore.c 2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/src/core/IxOsalOsSemaphore.c 2005-08-26 15:58:16.000000000 +0200
+@@ -46,7 +46,7 @@
+ */
+
+ #include <linux/slab.h>
+-#include <asm-arm/hardirq.h>
++#include <linux/hardirq.h>
+ #include "IxOsal.h"
+
+ /* Define a large number */
+@@ -93,7 +93,7 @@
+ {
+
+ IX_STATUS ixStatus = IX_SUCCESS;
+- UINT32 timeoutTime;
++ unsigned long timeoutTime;
+
+ if (sid == NULL)
+ {
+@@ -261,7 +261,7 @@ ixOsalMutexInit (IxOsalMutex * mutex)
+ PUBLIC IX_STATUS
+ ixOsalMutexLock (IxOsalMutex * mutex, INT32 timeout)
+ {
+- UINT32 timeoutTime;
++ unsigned long timeoutTime;
+
+ if (in_irq ())
+ {
+--- ixp_osal/os/linux/src/core/IxOsalOsServices.c 2005-04-17 20:56:28.000000000 -0700
++++ ixp_osal/os/linux/src/core/IxOsalOsServices.c 2005-10-01 16:37:00.876444607 -0700
+@@ -54,6 +54,7 @@
+ #include <linux/time.h>
+ #include <linux/sched.h>
+ #include <linux/slab.h>
++#include <linux/interrupt.h>
+
+ #include "IxOsal.h"
+
+@@ -89,7 +90,7 @@
+ /*
+ * General interrupt handler
+ */
+-static void
++static irqreturn_t
+ ixOsalOsIsrProxy (int irq, void *dev_id, struct pt_regs *regs)
+ {
+ IxOsalInfoType *isr_proxy_info = (IxOsalInfoType *) dev_id;
+@@ -98,6 +99,7 @@
+ "ixOsalOsIsrProxy: Interrupt used before ixOsalIrqBind was invoked");
+
+ isr_proxy_info->routine (isr_proxy_info->parameter);
++ return IRQ_HANDLED;
+ }
+
+ /*
+@@ -105,11 +107,12 @@
+ * This handler saves the interrupted Program Counter (PC)
+ * into a global variable
+ */
+-static void
++static irqreturn_t
+ ixOsalOsIsrProxyWithPC (int irq, void *dev_id, struct pt_regs *regs)
+ {
+ ixOsalLinuxInterruptedPc = regs->ARM_pc;
+ ixOsalOsIsrProxy(irq, dev_id, regs);
++ return IRQ_HANDLED;
+ }
+
+ /**************************************
+@@ -191,10 +194,15 @@
+ PUBLIC UINT32
+ ixOsalIrqLock ()
+ {
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++ unsigned long flags;
++ local_irq_save(flags);
++#else
+ UINT32 flags;
+ save_flags (flags);
+ cli ();
+- return flags;
++#endif
++ return (UINT32)flags;
+ }
+
+ /* Enable interrupts and task scheduling,
+@@ -204,7 +212,11 @@
+ PUBLIC void
+ ixOsalIrqUnlock (UINT32 lockKey)
+ {
++# if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++ local_irq_restore((unsigned long)lockKey);
++# else
+ restore_flags (lockKey);
++# endif
+ }
+
+ PUBLIC UINT32
+@@ -329,7 +341,7 @@
+ PUBLIC void
+ ixOsalSleep (UINT32 milliseconds)
+ {
+- if (milliseconds != 0)
++ if (milliseconds*HZ >= 1000)
+ {
+ set_current_state(TASK_INTERRUPTIBLE);
+ schedule_timeout ((milliseconds * HZ) / 1000);
+--- ixp_osal/os/linux/src/core/IxOsalOsThread.c 2005-11-20 00:59:09.734097888 -0800
++++ ixp_osal/os/linux/src/core/IxOsalOsThread.c 2005-11-20 01:00:07.057705036 -0800
+@@ -65,12 +65,7 @@ thread_internal (void *unused)
+ void *arg = IxOsalOsThreadData.arg;
+ static int seq = 0;
+
+- daemonize ();
+- reparent_to_init ();
+-
+- exit_files (current);
+-
+- snprintf(current->comm, sizeof(current->comm), "IxOsal %d", ++seq);
++ daemonize ("IxOsal %d", ++seq);
+
+ up (&IxOsalThreadMutex);
+
--- /dev/null
+diff -Naur ixp_osal.orig/Makefile ixp_osal/Makefile
+--- ixp_osal.orig/Makefile 2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/Makefile 2005-08-24 00:18:02.000000000 +0200
+@@ -172,7 +172,7 @@
+
+ # TODO push this to linux make
+ ifeq ($(IX_OSAL_MK_HOST_OS), linux)
+-INCLUDE_DIRS += $(LINUX_SRC)/include/asm-arm/arch-ixp425/
++INCLUDE_DIRS += $(LINUX_SRC)/include/asm-arm/arch-ixp4xx/
+ endif
+
+ CFLAGS += $(INCLUDE_DIRS:%=-I%)
+--- ixp_osal/os/linux/make/macros.mk.orig 2005-10-01 15:50:19.544167880 -0700
++++ ixp_osal/os/linux/make/macros.mk 2005-10-01 15:50:43.053647239 -0700
+@@ -88,10 +88,10 @@
+ # Compiler & linker options
+
+ # Compiler flags
+-LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mcpu=xscale -mtune=xscale
++LINUX_MACH_CFLAGS := -D__LINUX_ARM_ARCH__=5 -mtune=xscale
+
+ CFLAGS := -D__KERNEL__ -I$(LINUX_SRC)/include -Wall -Wno-trigraphs -fno-common \
+- -pipe -mapcs-32 -mshort-load-bytes -msoft-float -DMODULE \
++ -pipe -mapcs-32 -msoft-float -DMODULE \
+ -D__linux -DCPU=33 -DXSCALE=33 $(LINUX_MACH_CFLAGS) -DEXPORT_SYMTAB
+
+ # Linux linker flags
--- /dev/null
+# Unnecessary patch - reduces the code size slightly, gives clearer
+# messages if IX_OSAL_ENSURE_ON is set
+--- ixp_osal/include/IxOsalAssert.h 2005-11-20 15:19:59.128189352 -0800
++++ ixp_osal/include/IxOsalAssert.h 2005-11-20 15:20:46.099145048 -0800
+@@ -72,8 +72,8 @@
+ */
+ #ifdef IX_OSAL_ENSURE_ON
+ #define IX_OSAL_ENSURE(c, str) do { \
+-if (!(c)) ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, str, \
+-0, 0, 0, 0, 0, 0); } while (0)
++if (!(c)) ixOsalLog (IX_OSAL_LOG_LVL_MESSAGE, IX_OSAL_LOG_DEV_STDOUT, __FILE__ ": line %d: " str, \
++__LINE__, 0, 0, 0, 0, 0); } while (0)
+
+ #else
+ #define IX_OSAL_ENSURE(c, str)
+--- ixp_osal/os/linux/include/core/IxOsalOsAssert.h 2005-09-24 20:57:00.000000000 -0700
++++ ixp_osal/os/linux/include/core/IxOsalOsAssert.h 2005-11-20 15:25:32.273152843 -0800
+@@ -47,11 +47,18 @@
+
+ #ifndef IxOsalOsAssert_H
+ #define IxOsalOsAssert_H
++#ifdef IX_OSAL_ENSURE_ON
+ #define IX_OSAL_OS_ASSERT(c) if(!(c)) \
+ { \
+- ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDOUT, "Assertion failure \n", 0, 0, 0, 0, 0, 0);\
++ ixOsalLog (IX_OSAL_LOG_LVL_ERROR, IX_OSAL_LOG_DEV_STDOUT, "%s line %d: Assertion failure: %s\n", (int)__FILE__, __LINE__, (int)#c, 0, 0, 0);\
+ BUG(); \
+ }
++#else
++#define IX_OSAL_OS_ASSERT(c) if(!(c)) \
++ { \
++ BUG(); \
++ }
++#endif
+
+ /*
+ * Place holder.
--- /dev/null
+--- ixp_osal/os/linux/include/core/IxOsalOs.h 2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/include/core/IxOsalOs.h 2005-08-26 01:56:22.000000000 +0200
+@@ -56,6 +56,7 @@
+ #include <linux/cache.h>
+ #include <linux/mm.h>
+ #include <linux/config.h>
++#include <linux/version.h>
+ #include <asm/pgalloc.h>
+
+ /**
+@@ -66,9 +67,23 @@
+
+ #define IX_OSAL_OS_MMU_PHYS_TO_VIRT(addr) ((addr) ? phys_to_virt((unsigned int)(addr)) : 0)
+
+-#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size) ( invalidate_dcache_range((__u32)addr, (__u32)addr + size ))
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++/*
++ * 2.6 kernels do not export the required cache functions.
++ */
++extern void ixOsalCacheInvalidateRange(unsigned long start, unsigned long size);
++extern void ixOsalCacheFlushRange(unsigned long start, unsigned long size);
++
++#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size) \
++ixOsalCacheInvalidateRange((unsigned long)addr, (unsigned long)addr + size)
++#define IX_OSAL_OS_CACHE_FLUSH(addr, size) \
++ixOsalCacheFlushRange((unsigned long)addr, (unsigned long)addr + size )
+
++#else
++
++#define IX_OSAL_OS_CACHE_INVALIDATE(addr, size) ( invalidate_dcache_range((__u32)addr, (__u32)addr + size ))
+ #define IX_OSAL_OS_CACHE_FLUSH(addr, size) ( clean_dcache_range((__u32)addr, (__u32)addr + size ))
++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) */
+
+ #define printf printk /* For backword compatibility, needs to move to better location */
+
+--- ixp_osal/os/linux/src/core/IxOsalOsCacheMMU.c 2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/src/core/IxOsalOsCacheMMU.c 2005-08-26 01:56:22.000000000 +0200
+@@ -210,3 +210,59 @@
+ free_pages ((unsigned int) memptr, order);
+ }
+ }
++
++
++/*
++ * 2.6 kernels do not export the required cache functions.
++ */
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++
++#define _IX_STR(x) #x
++#define IX_STR(x) _IX_STR(x)
++#define IX_CLM IX_STR(IX_OSAL_CACHE_LINE_SIZE-1)
++
++/*
++ * reimplementation of kernel's invalidate_dcache_range()
++ */
++void
++ixOsalCacheInvalidateRange(unsigned long start, unsigned long size)
++{
++ __asm__
++ (" tst %0, #" IX_CLM "\n"
++ " mcrne p15, 0, %0, c7, c10, 1 @ clean D cache line\n"
++ " bic %0, %0, #" IX_CLM "\n"
++ " tst %1, #" IX_CLM "\n"
++ " mcrne p15, 0, %1, c7, c10, 1 @ clean D cache line\n"
++ "1: mcr p15, 0, %0, c7, c6, 1 @ invalidate D cache line\n"
++ " add %0, %0, #" IX_STR(IX_OSAL_CACHE_LINE_SIZE) "\n"
++ " cmp %0, %1\n"
++ " blo 1b\n"
++ " mcr p15, 0, %0, c7, c10, 4 @ drain write & fill buffer\n"
++ : /* no output */
++ : "r"(start), "r"(size)
++ : "cc");
++}
++
++/*
++ * reimplementation of kernel's invalidate_dcache_range()
++ */
++void
++ixOsalCacheFlushRange(unsigned long start, unsigned long size)
++{
++ __asm__
++ (" bic %0, %0, #" IX_CLM "\n"
++ "1: mcr p15, 0, %0, c7, c10, 1 @ clean D cache line\n"
++ " add %0, %0, #" IX_STR(IX_OSAL_CACHE_LINE_SIZE) "\n"
++ " cmp %0, %1\n"
++ " blo 1b\n"
++ " mcr p15, 0, %0, c7, c10, 4 @ drain write & fill buffer\n"
++ : /* no output */
++ : "r"(start), "r"(size)
++ : "cc");
++}
++
++#undef _IX_STR
++#undef IX_STR
++#undef IX_CLM
++
++#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)) */
+--- ixp_osal/os/linux/src/core/IxOsalOsSymbols.c 2005-08-24 00:16:37.000000000 +0200
++++ ixp_osal/os/linux/src/core/IxOsalOsSymbols.c 2005-08-30 19:19:33.000000000 +0200
+@@ -64,6 +64,10 @@
+
+ EXPORT_SYMBOL (ixOsalCacheDmaMalloc);
+ EXPORT_SYMBOL (ixOsalCacheDmaFree);
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
++EXPORT_SYMBOL (ixOsalCacheInvalidateRange);
++EXPORT_SYMBOL (ixOsalCacheFlushRange);
++#endif
+
+ EXPORT_SYMBOL (ixOsalThreadCreate);
+ EXPORT_SYMBOL (ixOsalThreadStart);
--- /dev/null
+--- ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h 2005-11-20 00:51:37.637649252 -0800
++++ ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h 2005-11-20 00:51:45.890168551 -0800
+@@ -53,6 +53,8 @@
+ #error "Error: IxOsalOsIxp425Sys.h cannot be included directly before IxOsalOsIxp400.h"
+ #endif
+
++#include "IxOsalOsIxp425Base.h"
++
+ /* Memory Base Address */
+ #define IX_OSAL_IXP400_EXP_BUS_PHYS_BASE IXP425_EXP_BUS_BASE2_PHYS
+ #define IX_OSAL_IXP400_EXP_BUS_BOOT_PHYS_BASE IXP425_EXP_BUS_BASE1_PHYS
+@@ -98,14 +98,14 @@ IxOsalMemoryMap ixOsalGlobalMemoryMap[]
+ * Queue Manager
+ */
+ {
+- IX_OSAL_STATIC_MAP, /* type */
++ IX_OSAL_DYNAMIC_MAP, /* type */
+ IX_OSAL_IXP400_QMGR_PHYS_BASE, /* physicalAddress */
+ IX_OSAL_IXP400_QMGR_MAP_SIZE, /* size */
+- IX_OSAL_IXP400_QMGR_VIRT_BASE, /* virtualAddress */
+- NULL, /* mapFunction */
+- NULL, /* unmapFunction */
++ 0, /* virtualAddress */
++ ixOsalLinuxMemMap, /* mapFunction */
++ ixOsalLinuxMemUnmap, /* unmapFunction */
+ 0, /* refCount */
+ IX_OSAL_BE | IX_OSAL_LE_DC, /* endianType */
+ "qMgr" /* name */
+ },
+
+--- ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Base.h 2005-09-06 00:17:15.000000000 -0700
++++ ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Base.h 2005-11-20 08:25:18.402543995 -0800
+@@ -0,0 +1,72 @@
++/*
++ * Glue for the current linux definitons of this stuff.
++ */
++#ifndef IxOsalOsIxp425Base_H
++#define IxOsalOsIxp425Base_H 1
++#include <asm-arm/arch-ixp4xx/ixp4xx-regs.h>
++
++/* Force Address Coherent (the default) mapping on LE - Linux 2.6
++ * does not have a way of changing it.
++ */
++#if defined IX_OSAL_LINUX_LE
++# if !defined IX_OSAL_ENFORCED_LE_AC_MAPPING
++# define IX_OSAL_ENFORCED_LE_AC_MAPPING
++# endif
++# if defined IX_OSAL_LE_DC_MAPPING
++# error Little Endian Data Coherent mapping not supported on this platform
++# endif
++
++/* This doesn't matter on a BE build because it will never be used,
++ * however it will be selected and will fail on an LE build.
++ */
++# undef IX_OSAL_LE_DC
++# define IX_OSAL_LE_DC IX_OSAL_LE_DC_IS_INVALID_ON_THIS_PLATFORM
++#endif
++
++/* Physical addresses. */
++#define IXP425_PERIPHERAL_BASE_PHYS IXP4XX_PERIPHERAL_BASE_PHYS
++#define IXP425_EXP_CFG_BASE_PHYS IXP4XX_EXP_CFG_BASE_PHYS
++#define IXP425_PCI_CFG_BASE_PHYS IXP4XX_PCI_CFG_BASE_PHYS
++
++//#define IXP425_EXP_BUS_BASE1_PHYS
++#define IXP425_EXP_BUS_BASE2_PHYS IXP4XX_EXP_BUS_CS2_BASE_PHYS
++//#define IXP425_EXP_BUS_CS0_BASE_PHYS
++//#define IXP425_EXP_BUS_CS1_BASE_PHYS
++//#define IXP425_EXP_BUS_CS4_BASE_PHYS
++#define IXP425_EthA_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0x9000)
++#define IXP425_EthB_BASE_PHYS (IXP4XX_PERIPHERAL_BASE_PHYS + 0xA000)
++//#define IXP425_GPIO_BASE_PHYS
++#define IXP425_INTC_BASE_PHYS IXP4XX_INTC_BASE_PHYS
++//#define IXP425_NPEA_BASE_PHYS
++//#define IXP425_NPEB_BASE_PHYS
++//#define IXP425_NPEC_BASE_PHYS
++//#define IXP425_PMU_BASE_PHYS
++#define IXP425_QMGR_BASE_PHYS IXP4XX_QMGR_BASE_PHYS
++#define IXP425_TIMER_BASE_PHYS IXP4XX_TIMER_BASE_PHYS
++//#define IXP425_UART1_BASE_PHYS
++//#define IXP425_UART2_BASE_PHYS
++#define IXP425_USB_BASE_PHYS IXP4XX_USB_BASE_PHYS
++
++/* Virtual addresses. */
++#define IXP425_PERIPHERAL_BASE_VIRT IXP4XX_PERIPHERAL_BASE_VIRT
++#define IXP425_PERIPHERAL_REGION_SIZE IXP4XX_PERIPHERAL_REGION_SIZE
++#define IXP425_EXP_CFG_BASE_VIRT IXP4XX_EXP_CFG_BASE_VIRT
++#define IXP425_PCI_CFG_BASE_VIRT IXP4XX_PCI_CFG_BASE_VIRT
++
++//#define IXP425_EthA_BASE_VIRT
++//#define IXP425_EthB_BASE_VIRT
++//#define IXP425_GPIO_BASE_VIRT
++//#define IXP425_NPEA_BASE_VIRT
++//#define IXP425_NPEB_BASE_VIRT
++//#define IXP425_NPEC_BASE_VIRT
++//#define IXP425_QMGR_BASE_VIRT /* must be ioremapped on Linux 2.6 */
++//#define IXP425_TIMER_BASE_VIRT
++//#define IXP425_UART1_BASE_VIRT
++//#define IXP425_UART2_BASE_VIRT
++//#define IXP425_USB_BASE_VIRT
++
++/* Miscellaneous stuff. */
++#define IRQ_IXP425_XSCALE_PMU IRQ_IXP4XX_XSCALE_PMU
++#define IXP425_ICMR IXP4XX_ICMR
++#define IRQ_IXP425_USB IRQ_IXP4XX_USB
++#endif
--- /dev/null
+--- ixp_osal/include/modules/ioMem/IxOsalIoMem.h 2005-04-17 20:56:25.000000000 -0700
++++ ixp_osal/include/modules/ioMem/IxOsalIoMem.h 2005-10-07 16:20:27.786083595 -0700
+@@ -105,8 +105,8 @@
+ #endif /* ndef __wince */
+
+ #define IX_OSAL_SWAP_SHORT(sData) ((sData >> 8) | ((sData & 0xFF) << 8))
+-#define IX_OSAL_SWAP_SHORT_ADDRESS(sAddr) ((sAddr) ^ 0x2)
+-#define IX_OSAL_SWAP_BYTE_ADDRESS(bAddr) ((bAddr) ^ 0x3)
++#define IX_OSAL_SWAP_SHORT_ADDRESS(sAddr) ((UINT16*)((UINT32)(sAddr) ^ 0x2))
++#define IX_OSAL_SWAP_BYTE_ADDRESS(bAddr) ((UINT8*)((UINT32)(bAddr) ^ 0x3))
+
+ #define IX_OSAL_BE_XSTOBUSL(wData) (wData)
+ #define IX_OSAL_BE_XSTOBUSS(sData) (sData)
+--- ixp_osal/include/modules/ioMem/IxOsalMemAccess.h 2005-04-17 20:56:25.000000000 -0700
++++ ixp_osal/include/modules/ioMem/IxOsalMemAccess.h 2005-11-19 16:44:33.414684841 -0800
+@@ -84,7 +84,7 @@
+
+ #elif defined (IX_OSAL_LINUX_LE)
+
+-#define IX_SDRAM_LE_DATA_COHERENT
++#define IX_SDRAM_LE_ADDRESS_COHERENT
+
+ #elif defined (IX_OSAL_WINCE_LE)
+
+--- ixp_osal/os/linux/include/platforms/ixp400/IxOsalOsIxp400CustomizedMapping.h 2005-04-17 20:56:27.000000000 -0700
++++ ixp_osal/os/linux/include/platforms/ixp400/IxOsalOsIxp400CustomizedMapping.h 2005-11-19 16:45:35.298578949 -0800
+@@ -171,7 +171,7 @@
+ ***************************/
+ #if (IX_COMPONENT_NAME == ix_qmgr)
+
+-#define IX_OSAL_LE_DC_MAPPING
++#define IX_OSAL_LE_AC_MAPPING
+
+ #endif /* qmgr */
+
+--- ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h 2005-11-19 15:53:11.808771607 -0800
++++ ixp_osal/os/linux/include/platforms/ixp400/ixp425/IxOsalOsIxp425Sys.h 2005-11-19 16:51:40.729574072 -0800
+@@ -101,6 +101,6 @@ IxOsalMemoryMap ixOsalGlobalMemoryMap[]
+ ixOsalLinuxMemUnmap, /* unmapFunction */
+ 0, /* refCount */
+- IX_OSAL_BE | IX_OSAL_LE_DC, /* endianType */
++ IX_OSAL_BE | IX_OSAL_LE_AC, /* endianType */
+ "qMgr" /* name */
+ },
+
+--- ixp_osal/os/linux/src/modules/ioMem/IxOsalOsIoMem.c 2005-09-24 20:57:03.000000000 -0700
++++ ixp_osal/os/linux/src/modules/ioMem/IxOsalOsIoMem.c 2005-11-20 15:21:33.670138502 -0800
+@@ -45,6 +45,7 @@
+ * -- End Intel Copyright Notice --
+ */
+
++#include <asm/page.h>
+ #include <asm/io.h>
+ #include <linux/ioport.h>
+
+@@ -54,6 +54,8 @@
+ PUBLIC void
+ ixOsalLinuxMemMap (IxOsalMemoryMap * map)
+ {
++ /* Linux requires LE mappings to use address coherency */
++ IX_OSAL_ENSURE((map->mapEndianType & IX_OSAL_LE_DC) == 0, "LE Data Coherency not supported");
+ map->virtualAddress = (UINT32) ioremap (map->physicalAddress, map->size);
+ }
+
# not required.)
#
# Store the file with the name given below in your downloads directory
+# and store the 32 character md5sum of the file in a file of the same
+# name with the additional extension .md5:
+#
+# IPL_ixp400AccessLibrary-2_0.zip.md5
#
SRC_URI = "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400AccessLibrary-2_0.zip"
SRC_URI += "file://Makefile.patch;patch=1"
--- /dev/null
+# Intel ixp4xx access library software. Note that this has an Intel
+# license which restricts its use.
+MAINTAINER = "NSLU2 Linux <nslu2-linux@yahoogroups.com>"
+HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp420.htm"
+LICENSE = "http://www.intel.com/design/network/swsup/np_sla/ixp400.htm"
+LICENSE_HOMEPAGE = "http://www.intel.com/design/network/products/npfamily/ixp425swr1.htm"
+# You must download the following software to your OpenEmbedded downloads
+# directory before using this package:
+#
+# IPL_ixp400AccessLibrary-2_1.zip
+#
+# To do this go to the LICENSE_HOMEPAGE above, register/login (using a
+# web browser which is supported by the login page), this will give you
+# access to the web page from which you can download the software - you
+# need the: "Intel® IXP400 Software and RedBoot* Boot Loader" and, from
+# this the "Intel Hardware Access Software" (versions 2.1 encryption is
+# not required.)
+#
+# Store the file with the name given below in your downloads directory
+# and store the 32 character md5sum of the file in a file of the same
+# name with the additional extension .md5:
+#
+# IPL_ixp400AccessLibrary-2_1.zip.md5
+#
+SRC_URI = "http://www.intel.com/Please-Read-The-BB-File/IPL_ixp400AccessLibrary-2_1.zip"
+SRC_URI += "file://Makefile.patch;patch=1"
+SRC_URI += "file://2.6.patch;patch=1"
+SRC_URI += "file://invalidate-cache.patch;patch=1"
+SRC_URI += "file://ixp4xx-header.patch;patch=1"
+SRC_URI += "file://le.patch;patch=1"
+SRC_URI += "file://assert.patch;patch=1"
+
+S = "${WORKDIR}/ixp_osal"
+PR = "r0"
+
+COMPATIBLE_HOST = "^arm.*-linux.*"
+
+inherit module
+
+# Add the architecture compiler flags to KERNEL_CC and KERNEL_LD as
+# required. Notice that this has to be done for each separately built
+# module as well!
+KERNEL_CC += "${TARGET_CC_KERNEL_ARCH}"
+KERNEL_LD += "${TARGET_LD_KERNEL_ARCH}"
+
+IX_TARGET = "linux${ARCH_BYTE_SEX}"
+IX_ENSURE = ""
+#IX_ENSURE = "IX_OSAL_ENSURE_ON=1"
+
+EXTRA_OEMAKE = "'CC=${KERNEL_CC}' \
+ 'LD=${KERNEL_LD}' \
+ 'AR=${AR}' \
+ 'IX_XSCALE_SW=${S}' \
+ 'IX_TARGET=${IX_TARGET}' \
+ 'IX_DEVICE=ixp42X' \
+ ${IX_ENSURE} \
+ 'LINUX_SRC=${STAGING_KERNEL_DIR}' \
+ 'LINUX_CROSS_COMPILE=${HOST_PREFIX}' \
+ "
+
+OSAL_PATH = "lib/ixp425/linux/${IX_TARGET}"
+# This is a somewhat arbitrary choice:
+OSAL_DIR = "${STAGING_KERNEL_DIR}/ixp_osal"
+
+do_compile () {
+ oe_runmake ${OSAL_PATH}/libosal.a ${OSAL_PATH}/ixp_osal.o
+}
+
+do_stage () {
+ # Clean the directory first, this ensures incremental builds have
+ # a slightly better chance of working
+ rm -rf ${OSAL_DIR}
+ install -d ${OSAL_DIR}
+
+ # First the include files, maintain the tree structure (ixp4xx-csr
+ # expects the exact same tree)
+ cp -rf --dereference include ${OSAL_DIR}
+ install -d ${OSAL_DIR}/os/linux
+ cp -rf --dereference os/linux/include ${OSAL_DIR}/os/linux
+
+ # Install the library/object
+ install -d ${OSAL_DIR}/${OSAL_PATH}
+ rm -f ${OSAL_DIR}/libosal
+ install -m 0644 ${OSAL_PATH}/libosal.a ${OSAL_DIR}/${OSAL_PATH}
+ touch ${OSAL_DIR}/libosal
+ rm -f ${OSAL_DIR}/module
+ install -m 0644 ${OSAL_PATH}/ixp_osal.o ${OSAL_DIR}/${OSAL_PATH}
+ touch ${OSAL_DIR}/module
+}
+
+# This stuff doesn't install anything...
+PACKAGES = ""
+
+do_install () {
+}
git.openpandora.org / openembedded.git / commitdiff