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ARM: clk-imx6sl: Select appropriate parents for LCDIF clocks
authorFabio Estevam <fabio.estevam@freescale.com>
Tue, 19 Aug 2014 18:21:12 +0000 (15:21 -0300)
committerShawn Guo <shawn.guo@freescale.com>
Tue, 16 Sep 2014 02:06:46 +0000 (10:06 +0800)
PLL5 is well suited for being the parent of IMX6SL_CLK_LCDIF_PIX_SEL and
PLL2_PFD for IMX6SL_CLK_LCDIF_AXI_SEL.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>

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