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ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant)
authorPawel Moll <pawel.moll@arm.com>
Thu, 15 Dec 2011 10:57:28 +0000 (10:57 +0000)
committerPawel Moll <pawel.moll@arm.com>
Fri, 24 Feb 2012 09:18:21 +0000 (09:18 +0000)
This patch adds Device Tree file for the CoreTile Express A15x2
(V2P-CA15) with Test Chip 1.

As the chip's GIC has 160 interrupt inputs and equivalent SMM
(FPGA) has GIC synthesised with 256 interrupts, NR_IRQS is
increased.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>

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