drm/i915: Use cached cdclk value
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 3 Jun 2015 12:45:08 +0000 (15:45 +0300)
committerJani Nikula <jani.nikula@intel.com>
Fri, 12 Jun 2015 10:14:33 +0000 (13:14 +0300)
Rather than reading out the current cdclk value use the cached value we
have tucked away in dev_priv.

v2: Rebased to the latest
v3: Rebased to the latest
v4: Fix for patch style problems

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_pm.c

index 9cf1553..d1dd8ab 100644 (file)
@@ -6610,8 +6610,7 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
 
        /* FIXME should check pixel clock limits on all platforms */
        if (INTEL_INFO(dev)->gen < 4) {
-               int clock_limit =
-                       dev_priv->display.get_display_clock_speed(dev);
+               int clock_limit = dev_priv->cdclk_freq;
 
                /*
                 * Enable pixel doubling when the dot clock
Simple merge
Simple merge