k3-am654-r5-base-board.dtb
dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-r5-common-proc-board.dtb \
- k3-j7200-r5-common-proc-board.dtb \
k3-j721e-r5-sk.dtb \
k3-j721e-r5-beagleboneai64.dtb
+dtb-$(CONFIG_SOC_K3_J7200) += k3-j7200-r5-common-proc-board.dtb
+
dtb-$(CONFIG_SOC_K3_J721S2) += k3-am68-sk-r5-base-board.dtb\
k3-j721s2-r5-common-proc-board.dtb
#ifdef CONFIG_TARGET_J7200_R5_EVM
-&bcfg_yaml {
- config = "board-cfg_j7200.yaml";
-};
-
-&rcfg_yaml {
- config = "rm-cfg_j7200.yaml";
-};
-
-&pcfg_yaml {
- config = "pm-cfg_j7200.yaml";
-};
-
-&scfg_yaml {
- config = "sec-cfg_j7200.yaml";
-};
-
-&bcfg_yaml_tifs {
- config = "board-cfg_j7200.yaml";
-};
-
-&rcfg_yaml_tifs {
- config = "rm-cfg_j7200.yaml";
-};
-
-&pcfg_yaml_tifs {
- config = "pm-cfg_j7200.yaml";
-};
-
-&scfg_yaml_tifs {
- config = "sec-cfg_j7200.yaml";
-};
-
-&rcfg_yaml_dm {
- config = "rm-cfg_j7200.yaml";
-};
-
-&pcfg_yaml_dm {
- config = "pm-cfg_j7200.yaml";
-};
-
&binman {
tiboot3-j7200-hs-evm.bin {
filename = "tiboot3-j7200-hs-evm.bin";
config SOC_K3_J721E
bool "TI's K3 based J721E SoC Family Support"
+config SOC_K3_J7200
+ bool "TI's K3 based J7200 SoC Family Support"
+
config SOC_K3_J721S2
bool "TI's K3 based J721S2 SoC Family Support"
endchoice
-if SOC_K3_J721E
-config SOC_K3_J721E_J7200
- bool "TI's K3 based J7200 SoC variant Family Support"
-endif
-
config SYS_SOC
default "k3"
config SYS_K3_NON_SECURE_MSRAM_SIZE
hex
default 0x80000 if SOC_K3_AM654
- default 0x100000 if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
+ default 0x100000 if SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J721S2 || SOC_K3_J784S4
default 0x1c0000 if SOC_K3_AM642
default 0x3c000 if SOC_K3_AM625 || SOC_K3_AM62A7
help
config SYS_K3_MAX_DOWNLODABLE_IMAGE_SIZE
hex
default 0x58000 if SOC_K3_AM654
- default 0xc0000 if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
+ default 0xc0000 if SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J721S2 || SOC_K3_J784S4
default 0x180000 if SOC_K3_AM642
default 0x38000 if SOC_K3_AM625 || SOC_K3_AM62A7
help
config SYS_K3_MCU_SCRATCHPAD_BASE
hex
default 0x40280000 if SOC_K3_AM654
- default 0x41cff9fc if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
+ default 0x41cff9fc if SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J721S2 || SOC_K3_J784S4
help
Describes the base address of MCU Scratchpad RAM.
config SYS_K3_MCU_SCRATCHPAD_SIZE
hex
default 0x200 if SOC_K3_AM654
- default 0x200 if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
+ default 0x200 if SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J721S2 || SOC_K3_J784S4
help
Describes the size of MCU Scratchpad RAM.
config SYS_K3_BOOT_PARAM_TABLE_INDEX
hex
default 0x41c7fbfc if SOC_K3_AM654
- default 0x41cffbfc if SOC_K3_J721E
+ default 0x41cffbfc if SOC_K3_J721E || SOC_K3_J7200
default 0x41cfdbfc if SOC_K3_J721S2 || SOC_K3_J784S4
default 0x701bebfc if SOC_K3_AM642
default 0x43c3f290 if SOC_K3_AM625
source "arch/arm/mach-k3/am62ax/Kconfig"
source "arch/arm/mach-k3/am62px/Kconfig"
source "arch/arm/mach-k3/j721e/Kconfig"
+source "arch/arm/mach-k3/j7200/Kconfig"
source "arch/arm/mach-k3/j721s2/Kconfig"
source "arch/arm/mach-k3/j722s/Kconfig"
source "arch/arm/mach-k3/j784s4/Kconfig"
obj-$(CONFIG_SOC_K3_AM642) += am64x/
obj-$(CONFIG_SOC_K3_AM654) += am65x/
obj-$(CONFIG_SOC_K3_J721E) += j721e/
+obj-$(CONFIG_SOC_K3_J7200) += j7200/
obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
obj-$(CONFIG_SOC_K3_J722S) += j722s/
obj-$(CONFIG_SOC_K3_J784S4) += j784s4/
#include "j721e_hardware.h"
#endif
+#ifdef CONFIG_SOC_K3_J7200
+#include "j721e_hardware.h"
+#endif
+
#ifdef CONFIG_SOC_K3_J721S2
#include "j721s2_hardware.h"
#endif
#include "j721e_spl.h"
#endif
+#ifdef CONFIG_SOC_K3_J7200
+#include "j721e_spl.h"
+#endif
+
#ifdef CONFIG_SOC_K3_J721S2
#include "j721s2_spl.h"
#endif
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+# Andrew Davis <afd@ti.com>
+
+if SOC_K3_J7200
+
+choice
+ prompt "K3 J7200 based boards"
+ optional
+
+config TARGET_J7200_A72_EVM
+ bool "TI K3 based J7200 EVM running on A72"
+ select ARM64
+ select BOARD_LATE_INIT
+ imply TI_I2C_BOARD_DETECT
+ select SYS_DISABLE_DCACHE_OPS
+ select BINMAN
+
+config TARGET_J7200_R5_EVM
+ bool "TI K3 based J7200 EVM running on R5"
+ select CPU_V7R
+ select SYS_THUMB_BUILD
+ select K3_LOAD_SYSFW
+ select RAM
+ select SPL_RAM
+ select K3_DDRSS
+ select BINMAN
+ imply SYS_K3_SPL_ATF
+ imply TI_I2C_BOARD_DETECT
+
+endchoice
+
+source "board/ti/j7200/Kconfig"
+
+endif
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+# Andrew Davis <afd@ti.com>
+
+obj-$(CONFIG_OF_SYSTEM_SETUP) += ../j721e/j721e_fdt.o
+obj-$(CONFIG_XPL_BUILD) += ../j721e/j721e_init.o
imply SYS_K3_SPL_ATF
imply TI_I2C_BOARD_DETECT
-config TARGET_J7200_A72_EVM
- bool "TI K3 based J7200 EVM running on A72"
- select ARM64
- select SOC_K3_J721E_J7200
- select BOARD_LATE_INIT
- imply TI_I2C_BOARD_DETECT
- select SYS_DISABLE_DCACHE_OPS
- select BINMAN
-
-config TARGET_J7200_R5_EVM
- bool "TI K3 based J7200 EVM running on R5"
- select CPU_V7R
- select SYS_THUMB_BUILD
- select K3_LOAD_SYSFW
- select RAM
- select SPL_RAM
- select K3_DDRSS
- select BINMAN
- imply SYS_K3_SPL_ATF
- imply TI_I2C_BOARD_DETECT
-
endchoice
source "board/beagle/beagleboneai64/Kconfig"
#ifdef CONFIG_K3_LOAD_SYSFW
struct fwl_data cbass_hc_cfg0_fwls[] = {
-#if defined(CONFIG_TARGET_J721E_R5_EVM)
+#if defined(CONFIG_SOC_K3_J721E)
{ "PCIE0_CFG", 2560, 8 },
{ "PCIE1_CFG", 2561, 8 },
{ "USB3SS0_CORE", 2568, 4 },
{ "UFS_HCI0_CFG", 2580, 4 },
{ "SERDES0", 2584, 1 },
{ "SERDES1", 2585, 1 },
-#elif defined(CONFIG_TARGET_J7200_R5_EVM)
+#elif defined(CONFIG_SOC_K3_J7200)
{ "PCIE1_CFG", 2561, 7 },
#endif
}, cbass_hc0_fwls[] = {
-#if defined(CONFIG_TARGET_J721E_R5_EVM)
+#if defined(CONFIG_SOC_K3_J721E)
{ "PCIE0_HP", 2528, 24 },
{ "PCIE0_LP", 2529, 24 },
{ "PCIE1_HP", 2530, 24 },
obj-$(CONFIG_SOC_K3_AM62A7) += am62ax/
obj-$(CONFIG_SOC_K3_AM62P5) += am62px/
obj-$(CONFIG_SOC_K3_J721E) += j721e/
-obj-$(CONFIG_SOC_K3_J721E) += j7200/
+obj-$(CONFIG_SOC_K3_J7200) += j7200/
obj-$(CONFIG_SOC_K3_J721S2) += j721s2/
obj-$(CONFIG_SOC_K3_J722S) += j722s/
obj-$(CONFIG_SOC_K3_J784S4) += j784s4/
--- /dev/null
+# SPDX-License-Identifier: GPL-2.0+
+#
+# Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
+# Lokesh Vutla <lokeshvutla@ti.com>
+
+if TARGET_J7200_A72_EVM
+
+config SYS_BOARD
+ default "j7200"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "j721e_evm"
+
+config ENV_SOURCE_FILE
+ default "j7200"
+
+source "board/ti/common/Kconfig"
+
+endif
+
+if TARGET_J7200_R5_EVM
+
+config SYS_BOARD
+ default "j7200"
+
+config SYS_VENDOR
+ default "ti"
+
+config SYS_CONFIG_NAME
+ default "j721e_evm"
+
+config ENV_SOURCE_FILE
+ default "j7200"
+
+source "board/ti/common/Kconfig"
+
+endif
--- /dev/null
+J7200 BOARD
+M: Tom Rini <trini@konsulko.com>
+S: Maintained
+F: board/ti/j7200
+F: include/configs/j7200_evm.h
+F: configs/j7200_evm_r5_defconfig
+F: configs/j7200_evm_a72_defconfig
--- /dev/null
+#
+# Copyright (C) 2025 Texas Instruments Incorporated - https://www.ti.com/
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y += ../j721e/evm.o
--- /dev/null
+#include <env/ti/ti_common.env>
+#include <env/ti/mmc.env>
+#include <env/ti/ufs.env>
+#include <env/ti/k3_dfu.env>
+
+#if CONFIG_CMD_REMOTEPROC
+#include <env/ti/k3_rproc.env>
+#endif
+
+name_kern=Image
+console=ttyS2,115200n8
+args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000
+ ${mtdparts}
+run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}
+
+#if CONFIG_TARGET_J7200_R5_EVM
+addr_mcur5f0_0load=0x89000000
+name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw
+#endif
+
+boot_targets=mmc1 mmc0 usb pxe dhcp
+boot=mmc
+mmcdev=1
+bootpart=1:2
+bootdir=/boot
+rd_spec=-
+
+#if CONFIG_TARGET_J7200_A72_EVM
+do_main_cpsw0_qsgmii_phyinit=1
+init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;
+ gpio clear gpio@22_16
+main_cpsw0_qsgmii_phyinit=
+ if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && test ${boot} = mmc; then
+ run init_main_cpsw0_qsgmii_phy;
+ fi;
+#endif
+
+#if CONFIG_TARGET_J7200_A72_EVM
+rproc_fw_binaries=2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
+#endif
source "board/ti/common/Kconfig"
endif
-
-if TARGET_J7200_A72_EVM
-
-config SYS_BOARD
- default "j721e"
-
-config SYS_VENDOR
- default "ti"
-
-config SYS_CONFIG_NAME
- default "j721e_evm"
-
-config ENV_SOURCE_FILE
- default "j721e"
-
-source "board/ti/common/Kconfig"
-
-endif
-
-if TARGET_J7200_R5_EVM
-
-config SYS_BOARD
- default "j721e"
-
-config SYS_VENDOR
- default "ti"
-
-config SYS_CONFIG_NAME
- default "j721e_evm"
-
-config ENV_SOURCE_FILE
- default "j721e"
-
-source "board/ti/common/Kconfig"
-
-endif
F: configs/j721e_evm_a72_defconfig
F: configs/j721e_sk_r5_defconfig
F: configs/j721e_sk_a72_defconfig
-F: configs/j7200_evm_r5_defconfig
-F: configs/j7200_evm_a72_defconfig
#if CONFIG_TARGET_J721E_R5_EVM
addr_mcur5f0_0load=0x89000000
name_mcur5f0_0fw=/lib/firmware/j7-mcu-r5f0_0-fw
-#elif CONFIG_TARGET_J7200_R5_EVM
-addr_mcur5f0_0load=0x89000000
-name_mcur5f0_0fw=/lib/firmware/j7200-mcu-r5f0_0-fw
#endif
boot_targets=mmc1 mmc0 usb pxe dhcp
bootdir=/boot
rd_spec=-
-#if CONFIG_TARGET_J7200_A72_EVM
-do_main_cpsw0_qsgmii_phyinit=1
-init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;
- gpio clear gpio@22_16
-main_cpsw0_qsgmii_phyinit=
- if test ${do_main_cpsw0_qsgmii_phyinit} -eq 1 && test ${dorprocboot} -eq 1 && test ${boot} = mmc; then
- run init_main_cpsw0_qsgmii_phy;
- fi;
-#elif CONFIG_TARGET_J721E_A72_EVM
+#if CONFIG_TARGET_J721E_A72_EVM
init_main_cpsw0_qsgmii_phy=gpio set gpio@22_17;
gpio clear gpio@22_16
main_cpsw0_qsgmii_phyinit=
#if CONFIG_TARGET_J721E_A72_EVM
rproc_fw_binaries=2 /lib/firmware/j7-main-r5f0_0-fw 3 /lib/firmware/j7-main-r5f0_1-fw 4 /lib/firmware/j7-main-r5f1_0-fw 5 /lib/firmware/j7-main-r5f1_1-fw 6 /lib/firmware/j7-c66_0-fw 7 /lib/firmware/j7-c66_1-fw 8 /lib/firmware/j7-c71_0-fw
#endif
-
-#if CONFIG_TARGET_J7200_A72_EVM
-rproc_fw_binaries=2 /lib/firmware/j7200-main-r5f0_0-fw 3 /lib/firmware/j7200-main-r5f0_1-fw
-#endif
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SOC_K3_J721E=y
+CONFIG_SOC_K3_J7200=y
CONFIG_TARGET_J7200_A72_EVM=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000
CONFIG_SPL_GPIO=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_SOC_K3_J721E=y
+CONFIG_SOC_K3_J7200=y
CONFIG_K3_EARLY_CONS=y
CONFIG_TARGET_J7200_R5_EVM=y
CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
.family = "J721E",
.data = &j721e_clk_platdata,
},
+#endif
+#if IS_ENABLED(CONFIG_SOC_K3_J7200)
{
.family = "J7200",
.data = &j7200_clk_platdata,
k3-psil-data-y += k3-psil.o
k3-psil-data-$(CONFIG_SOC_K3_AM654) += k3-psil-am654.o
k3-psil-data-$(CONFIG_SOC_K3_J721E) += k3-psil-j721e.o
+k3-psil-data-$(CONFIG_SOC_K3_J7200) += k3-psil-j721e.o
k3-psil-data-$(CONFIG_SOC_K3_J721S2) += k3-psil-j721s2.o
k3-psil-data-$(CONFIG_SOC_K3_AM642) += k3-psil-am64.o
k3-psil-data-$(CONFIG_SOC_K3_AM625) += k3-psil-am62.o
soc_ep_map = &am654_ep_map;
else if (IS_ENABLED(CONFIG_SOC_K3_J721E))
soc_ep_map = &j721e_ep_map;
+ else if (IS_ENABLED(CONFIG_SOC_K3_J7200))
+ soc_ep_map = &j721e_ep_map;
else if (IS_ENABLED(CONFIG_SOC_K3_J721S2))
soc_ep_map = &j721s2_ep_map;
else if (IS_ENABLED(CONFIG_SOC_K3_AM642))
#if IS_ENABLED(CONFIG_K3_DM_FW)
-#if IS_ENABLED(CONFIG_SOC_K3_J721E)
+#if IS_ENABLED(CONFIG_SOC_K3_J721E) || IS_ENABLED(CONFIG_SOC_K3_J7200)
static struct ti_sci_resource_static_data rm_static_data[] = {
/* Free rings */
{
.family = "J721E",
.data = &j721e_pd_platdata,
},
+#endif
+#if IS_ENABLED(CONFIG_SOC_K3_J7200)
{
.family = "J7200",
.data = &j7200_pd_platdata,
depends on K3_DDRSS
prompt "K3 DDRSS Arch Support"
- default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J721S2 || SOC_K3_J784S4
+ default K3_J721E_DDRSS if SOC_K3_J721E || SOC_K3_J7200 || SOC_K3_J721S2 || SOC_K3_J784S4
default K3_AM64_DDRSS if SOC_K3_AM642
default K3_AM64_DDRSS if SOC_K3_AM625
default K3_AM62A_DDRSS if SOC_K3_AM62A7 || SOC_K3_AM62P5 || SOC_K3_J722S