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i2c: piix4: Add support for AMD ML and CZ SMBus changes
authorShane Huang <shane.huang@amd.com>
Wed, 22 Jan 2014 22:05:46 +0000 (14:05 -0800)
committerWolfram Sang <wsa@the-dreams.de>
Fri, 24 Jan 2014 16:48:51 +0000 (17:48 +0100)
The locations of SMBus register base address and enablement bit are changed
from AMD ML, which need this patch to be supported.

Signed-off-by: Shane Huang <shane.huang@amd.com>
Reviewed-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@vger.kernel.org

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