ufs: core: cosmetic fixups
authorNeil Armstrong <neil.armstrong@linaro.org>
Mon, 30 Dec 2024 10:30:57 +0000 (11:30 +0100)
committerNeil Armstrong <neil.armstrong@linaro.org>
Tue, 18 Mar 2025 14:31:49 +0000 (15:31 +0100)
Fixes some alignment warnings, missing comments on write barrier,
missing parenthesis around macro parameters and a comment typo.

No functional changes intended.

Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Love Kumar <love.kumar@amd.com>
Link: https://lore.kernel.org/r/20241230-topic-ufs-cleanup-v2-3-4c6d7994a45d@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
drivers/ufs/ufs.c
drivers/ufs/ufs.h
drivers/ufs/unipro.h

index 654f8b6..91f6ad3 100644 (file)
@@ -314,16 +314,12 @@ static int ufshcd_disable_tx_lcc(struct ufs_hba *hba, bool peer)
                ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES),
                                    &tx_lanes);
        for (i = 0; i < tx_lanes; i++) {
+               unsigned int val = UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
+                                                  UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i));
                if (!peer)
-                       err = ufshcd_dme_set(hba,
-                                            UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
-                                            UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
-                                            0);
+                       err = ufshcd_dme_set(hba, val, 0);
                else
-                       err = ufshcd_dme_peer_set(hba,
-                                       UIC_ARG_MIB_SEL(TX_LCC_ENABLE,
-                                       UIC_ARG_MPHY_TX_GEN_SEL_INDEX(i)),
-                                       0);
+                       err = ufshcd_dme_peer_set(hba, val, 0);
                if (err) {
                        dev_err(hba->dev, "%s: TX LCC Disable failed, peer = %d, lane = %d, err = %d\n",
                                __func__, peer, i, err);
@@ -1962,7 +1958,7 @@ int ufshcd_probe(struct udevice *ufs_dev, struct ufs_hba_ops *hba_ops)
 
        ufshcd_ops_init(hba);
 
-       /* Read capabilties registers */
+       /* Read capabilities registers */
        hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
        if (hba->quirks & UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS)
                hba->capabilities &= ~MASK_64_ADDRESSING_SUPPORT;
@@ -2001,7 +1997,7 @@ int ufshcd_probe(struct udevice *ufs_dev, struct ufs_hba_ops *hba_ops)
                      REG_INTERRUPT_STATUS);
        ufshcd_writel(hba, 0, REG_INTERRUPT_ENABLE);
 
-       mb();
+       mb(); /* flush previous writes */
 
        /* Reset the attached device */
        ufshcd_device_reset(hba);
index 00ecca3..f4f0420 100644 (file)
@@ -130,8 +130,8 @@ enum {
                                        (sizeof(struct utp_upiu_header)))
 #define RESPONSE_UPIU_SENSE_DATA_LENGTH        18
 #define UPIU_HEADER_DWORD(byte3, byte2, byte1, byte0)\
-                       cpu_to_be32((byte3 << 24) | (byte2 << 16) |\
-                        (byte1 << 8) | (byte0))
+                       cpu_to_be32(((byte3) << 24) | ((byte2) << 16) |\
+                        ((byte1) << 8) | (byte0))
 /*
  * UFS Protocol Information Unit related definitions
  */
@@ -915,7 +915,7 @@ static inline int ufshcd_ops_get_max_pwr_mode(struct ufs_hba *hba,
 }
 
 static inline int ufshcd_ops_hce_enable_notify(struct ufs_hba *hba,
-                                               bool status)
+                                              bool status)
 {
        if (hba->ops && hba->ops->hce_enable_notify)
                return hba->ops->hce_enable_notify(hba, status);
index 6df953e..0aa35ef 100644 (file)
@@ -59,7 +59,7 @@
 #define RXSQCTRL                               0x00B5
 #define CFGRXOVR6                              0x00BF
 
-#define is_mphy_tx_attr(attr)                  (attr < RX_MODE)
+#define is_mphy_tx_attr(attr)                  ((attr) < RX_MODE)
 #define RX_MIN_ACTIVATETIME_UNIT_US            100
 #define HIBERN8TIME_UNIT_US                    100
 
@@ -77,7 +77,7 @@
 #define CBPRGPLL2                              UNIPRO_CB_OFFSET(0x00F8)
 #define CBPRGTUNING                            UNIPRO_CB_OFFSET(0x00FB)
 
-#define UNIPRO_CB_OFFSET(x)                    (0x8000 | x)
+#define UNIPRO_CB_OFFSET(x)                    (0x8000 | (x))
 
 /*
  * PHY Adpater attributes