ARM: v7 setup function should invalidate L1 cache
authorRussell King <rmk+kernel@arm.linux.org.uk>
Tue, 19 May 2015 16:06:44 +0000 (17:06 +0100)
committerRussell King <rmk+kernel@arm.linux.org.uk>
Mon, 1 Jun 2015 10:30:26 +0000 (11:30 +0100)
All ARMv5 and older CPUs invalidate their caches in the early assembly
setup function, prior to enabling the MMU.  This is because the L1
cache should not contain any data relevant to the execution of the
kernel at this point; all data should have been flushed out to memory.

This requirement should also be true for ARMv6 and ARMv7 CPUs - indeed,
these typically do not search their caches when caching is disabled (as
it needs to be when the MMU is disabled) so this change should be safe.

ARMv7 allows there to be CPUs which search their caches while caching is
disabled, and it's permitted that the cache is uninitialised at boot;
for these, the architecture reference manual requires that an
implementation specific code sequence is used immediately after reset
to ensure that the cache is placed into a sane state.  Such
functionality is definitely outside the remit of the Linux kernel, and
must be done by the SoC's firmware before _any_ CPU gets to the Linux
kernel.

Changing the data cache clean+invalidate to a mere invalidate allows us
to get rid of a lot of platform specific hacks around this issue for
their secondary CPU bringup paths - some of which were buggy.

Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Florian Fainelli <f.fainelli@gmail.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
31 files changed:
arch/arm/mach-bcm/Makefile
arch/arm/mach-bcm/brcmstb.h [deleted file]
arch/arm/mach-bcm/headsmp-brcmstb.S [deleted file]
arch/arm/mach-bcm/platsmp-brcmstb.c
arch/arm/mach-berlin/headsmp.S
arch/arm/mach-berlin/platsmp.c
arch/arm/mach-hisi/Makefile
arch/arm/mach-hisi/core.h
arch/arm/mach-hisi/headsmp.S [deleted file]
arch/arm/mach-hisi/platsmp.c
arch/arm/mach-imx/headsmp.S
arch/arm/mach-mvebu/headsmp-a9.S
arch/arm/mach-prima2/headsmp.S
arch/arm/mach-rockchip/core.h
arch/arm/mach-rockchip/headsmp.S
arch/arm/mach-rockchip/platsmp.c
arch/arm/mach-shmobile/common.h
arch/arm/mach-shmobile/headsmp-scu.S
arch/arm/mach-shmobile/headsmp.S
arch/arm/mach-shmobile/platsmp-apmu.c
arch/arm/mach-socfpga/core.h
arch/arm/mach-socfpga/headsmp.S
arch/arm/mach-socfpga/platsmp.c
arch/arm/mach-tegra/Makefile
arch/arm/mach-tegra/headsmp.S [deleted file]
arch/arm/mach-tegra/reset.c
arch/arm/mach-tegra/reset.h
arch/arm/mach-zynq/common.h
arch/arm/mach-zynq/headsmp.S
arch/arm/mach-zynq/platsmp.c
arch/arm/mm/proc-v7.S

index 4c38674..54d274d 100644 (file)
@@ -43,5 +43,5 @@ obj-$(CONFIG_ARCH_BCM_63XX)   := bcm63xx.o
 ifeq ($(CONFIG_ARCH_BRCMSTB),y)
 CFLAGS_platsmp-brcmstb.o       += -march=armv7-a
 obj-y                          += brcmstb.o
-obj-$(CONFIG_SMP)              += headsmp-brcmstb.o platsmp-brcmstb.o
+obj-$(CONFIG_SMP)              += platsmp-brcmstb.o
 endif
diff --git a/arch/arm/mach-bcm/brcmstb.h b/arch/arm/mach-bcm/brcmstb.h
deleted file mode 100644 (file)
index ec0c3d1..0000000
+++ /dev/null
@@ -1,19 +0,0 @@
-/*
- * Copyright (C) 2013-2014 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __BRCMSTB_H__
-#define __BRCMSTB_H__
-
-void brcmstb_secondary_startup(void);
-
-#endif /* __BRCMSTB_H__ */
diff --git a/arch/arm/mach-bcm/headsmp-brcmstb.S b/arch/arm/mach-bcm/headsmp-brcmstb.S
deleted file mode 100644 (file)
index 199c1ea..0000000
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * SMP boot code for secondary CPUs
- * Based on arch/arm/mach-tegra/headsmp.S
- *
- * Copyright (C) 2010 NVIDIA, Inc.
- * Copyright (C) 2013-2014 Broadcom Corporation
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <asm/assembler.h>
-#include <linux/linkage.h>
-#include <linux/init.h>
-
-        .section ".text.head", "ax"
-
-ENTRY(brcmstb_secondary_startup)
-        /*
-         * Ensure CPU is in a sane state by disabling all IRQs and switching
-         * into SVC mode.
-         */
-        setmode        PSR_I_BIT | PSR_F_BIT | SVC_MODE, r0
-
-        bl      v7_invalidate_l1
-        b       secondary_startup
-ENDPROC(brcmstb_secondary_startup)
index e209e6f..44d6bdd 100644 (file)
@@ -30,8 +30,6 @@
 #include <asm/mach-types.h>
 #include <asm/smp_plat.h>
 
-#include "brcmstb.h"
-
 enum {
        ZONE_MAN_CLKEN_MASK             = BIT(0),
        ZONE_MAN_RESET_CNTL_MASK        = BIT(1),
@@ -153,7 +151,7 @@ static void brcmstb_cpu_boot(u32 cpu)
         * Set the reset vector to point to the secondary_startup
         * routine
         */
-       cpu_set_boot_addr(cpu, virt_to_phys(brcmstb_secondary_startup));
+       cpu_set_boot_addr(cpu, virt_to_phys(secondary_startup));
 
        /* Unhalt the cpu */
        cpu_rst_cfg_set(cpu, 0);
index 4a4c56a..dc82a34 100644 (file)
 #include <linux/init.h>
 #include <asm/assembler.h>
 
-ENTRY(berlin_secondary_startup)
- ARM_BE8(setend be)
-       bl      v7_invalidate_l1
-       b       secondary_startup
-ENDPROC(berlin_secondary_startup)
-
 /*
  * If the following instruction is set in the reset exception vector, CPUs
  * will fetch the value of the software reset address vector when being
index 702e798..34a3753 100644 (file)
@@ -22,7 +22,6 @@
 #define RESET_VECT             0x00
 #define SW_RESET_ADDR          0x94
 
-extern void berlin_secondary_startup(void);
 extern u32 boot_inst;
 
 static void __iomem *cpu_ctrl;
@@ -85,7 +84,7 @@ static void __init berlin_smp_prepare_cpus(unsigned int max_cpus)
         * Write the secondary startup address into the SW reset address
         * vector. This is used by boot_inst.
         */
-       writel(virt_to_phys(berlin_secondary_startup), vectors_base + SW_RESET_ADDR);
+       writel(virt_to_phys(secondary_startup), vectors_base + SW_RESET_ADDR);
 
        iounmap(vectors_base);
 unmap_scu:
index 6b7b303..659db19 100644 (file)
@@ -6,4 +6,4 @@ CFLAGS_platmcpm.o       := -march=armv7-a
 
 obj-y  += hisilicon.o
 obj-$(CONFIG_MCPM)             += platmcpm.o
-obj-$(CONFIG_SMP)              += platsmp.o hotplug.o headsmp.o
+obj-$(CONFIG_SMP)              += platsmp.o hotplug.o
index 92a682d..c7648ef 100644 (file)
@@ -12,7 +12,6 @@ extern void hi3xxx_cpu_die(unsigned int cpu);
 extern int hi3xxx_cpu_kill(unsigned int cpu);
 extern void hi3xxx_set_cpu(int cpu, bool enable);
 
-extern void hisi_secondary_startup(void);
 extern struct smp_operations hix5hd2_smp_ops;
 extern void hix5hd2_set_cpu(int cpu, bool enable);
 extern void hix5hd2_cpu_die(unsigned int cpu);
diff --cc arch/arm/mach-hisi/headsmp.S
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diff --cc arch/arm/mach-tegra/headsmp.S
Simple merge
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