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spi/pxa2xx: enable multiblock DMA transfers for LPSS devices
authorMika Westerberg <mika.westerberg@linux.intel.com>
Tue, 5 Mar 2013 10:05:17 +0000 (12:05 +0200)
committerMark Brown <broonie@opensource.wolfsonmicro.com>
Tue, 12 Mar 2013 18:30:56 +0000 (18:30 +0000)
Intel LPSS SPI controllers need to have bit 0 (disable_ssp_dma_finish) set
in SSP_REG in order to properly perform DMA transfers spanning over
multiple blocks.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

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