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[MIPS] Cleanup memory barriers for weakly ordered systems.
authorRalf Baechle <ralf@linux-mips.org>
Tue, 31 Oct 2006 03:45:07 +0000 (03:45 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 4 Dec 2006 22:43:14 +0000 (22:43 +0000)
Also the R4000 / R4600 LL/SC instructions imply a sync so no explicit sync
needed.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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