powerpc/mm: Use read barrier when creating real_pte
authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Wed, 13 Aug 2014 07:02:03 +0000 (12:32 +0530)
committerBen Hutchings <ben@decadent.org.uk>
Sat, 13 Sep 2014 22:41:44 +0000 (23:41 +0100)
commitf9b211847bfb9c50483c7b62875e9aefbbce6f78
treec834ea94b82942f179a313e063553378d93ce4db
parent7a07d3c3824ca293447d4d9c48c0aeb378120835
powerpc/mm: Use read barrier when creating real_pte

commit 85c1fafd7262e68ad821ee1808686b1392b1167d upstream.

On ppc64 we support 4K hash pte with 64K page size. That requires
us to track the hash pte slot information on a per 4k basis. We do that
by storing the slot details in the second half of pte page. The pte bit
_PAGE_COMBO is used to indicate whether the second half need to be
looked while building real_pte. We need to use read memory barrier while
doing that so that load of hidx is not reordered w.r.t _PAGE_COMBO
check. On the store side we already do a lwsync in __hash_page_4K

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
[bwh: Backported to 3.2: include <asm/system.h> to ensure smp_rmb()
 is defined; cell_defconfig fails to build without this]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
arch/powerpc/include/asm/pte-hash64-64k.h