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(parent: 5afad3d) | patch
riscv: cpu: th1520: Add a routine to bring up secondary cores
authorYao Zi <ziyao@disroot.org>
Fri, 6 Jun 2025 04:28:02 +0000 (04:28 +0000)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 3 Jul 2025 08:14:13 +0000 (16:14 +0800)
commitf28911368eaf1b403e85ac0346fadee3fa21b6c4
tree398277b032d84a0f609a84aba1d5f1427cb29371tree | snapshot
parent5afad3d4a314464af34f9c312d3028b9053f1135commit | diff
riscv: cpu: th1520: Add a routine to bring up secondary cores

On coldboot, only HART 0 among the four HARTs of TH1520 is brought up by
hardware, and the remaining HARTs are in reset states, requiring manual
setup of reset address and deassertion to function normal. Introduce a
routine to do the work.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/cpu/th1520/cpu.c diff | blob | history
arch/riscv/include/asm/arch-th1520/cpu.h diff | blob | history
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