ARM: tegra124: clock: implement PLLD2 support
authorSvyatoslav Ryhel <clamor95@gmail.com>
Fri, 15 Nov 2024 19:13:15 +0000 (21:13 +0200)
committerSvyatoslav Ryhel <clamor95@gmail.com>
Wed, 12 Feb 2025 08:35:17 +0000 (10:35 +0200)
commite4f5741c6dc3ba5d867336244c53eb092b273f60
tree856bf0124ef4ab52dcff3c0af1287f071715e2f2
parentb93e25dc73acdc07c16074923aeeb305db21157a
ARM: tegra124: clock: implement PLLD2 support

PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
arch/arm/include/asm/arch-tegra124/clock-tables.h
arch/arm/mach-tegra/tegra124/clock.c