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(parent: 36adce7) | patch
clk: rockchip: rk3308: Fix ordering between masking and shifting
authorMassimo Pegorer <massimo.pegorer+oss@gmail.com>
Thu, 3 Aug 2023 11:08:11 +0000 (13:08 +0200)
committerKever Yang <kever.yang@rock-chips.com>
Sat, 12 Aug 2023 02:37:57 +0000 (10:37 +0800)
commite4c6ccc6875638766970d249a6cb5dacce6822fe
tree3fcae2f77e2e2668f4e0f328a80448e03b7e1914tree | snapshot
parent36adce73724d53f0a22520af86690381b69518aacommit | diff
clk: rockchip: rk3308: Fix ordering between masking and shifting

As per definitions of masks and shift offsets in cru_rk3308.h, values
read from registers must be first masked and then shifted. By the way,
this fix is binary invariant, because in all of fixed cases the shift
offset is zero.

Signed-off-by: Massimo Pegorer <massimo.pegorer+oss@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
drivers/clk/rockchip/clk_rk3308.c diff | blob | history
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