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(parent: 6beb48a) | patch
sync socfpga common u-boot dts
authorBrian Sune <briansune@gmail.com>
Mon, 10 Nov 2025 05:00:40 +0000 (13:00 +0800)
committerTien Fong Chee <tien.fong.chee@intel.com>
Mon, 1 Dec 2025 06:02:01 +0000 (14:02 +0800)
commite291277689f62e2e9170d8e130d876de6161b363
tree5d32328d26726e4207308b91e31127f05aa9cf03tree | snapshot
parent6beb48a3952b59e7b8b613ecf29e75d87d796f60commit | diff
sync socfpga common u-boot dts

The dtsi for socfpga common should
turn on L2 and memory and no reason not
to do so

Signed-off-by: Brian Sune <briansune@gmail.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
arch/arm/dts/socfpga-common-u-boot.dtsi diff | blob | history
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