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(parent: c85b807) | patch
configs: qemu-sbsa: Define GIC register base address
authorKunihiko Hayashi <hayashi.kunihiko@socionext.com>
Wed, 10 Sep 2025 09:23:26 +0000 (18:23 +0900)
committerTom Rini <trini@konsulko.com>
Fri, 19 Sep 2025 17:55:29 +0000 (11:55 -0600)
commite246e2b65885e6d5fd052ec2acdf2b07a53171f0
treeb20e4408497dd40331d55efb34f5bebd1955e11atree | snapshot
parentc85b8071e7d3fd333f8a2fdd28083cb5ec3a0645commit | diff
configs: qemu-sbsa: Define GIC register base address

If GICV3 is enabled, GICD_BASE and GICR_BASE are needed at
arch/arm/cpu/armv8/start.S.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
include/configs/qemu-sbsa.h diff | blob | history
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