riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader

riscv: dts: starfive: jh7110: bootph-pre-ram hinting needed by boot loader

Add bootph-pre-ram hinting to jh7110.dtsi:
  - CPU interrupt controller(s)
  - gmac1_rgmii_rxin fixed-clock (dependency of syscrg)
  - gmac1_rmii_refin fixed-clock (dependency of syscrg)
  - oscillator
  - core local interrupt timer
  - syscrg clock-controller
  - pllclk clock-controller (dependency of syscrg)
  - DDR memory controller

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
[ upstream commit: 8181cc2f3f21657392da912eb20ee17514c87828 ]

(cherry picked from commit a31c1c85876bf9f15f3df14959354ab9a200ffa0)