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mtd: nand: pxa3xx: Add support for the Marvell AC5 SoC
authorChris Packham <judge.packham@gmail.com>
Sun, 9 Jul 2023 22:47:34 +0000 (10:47 +1200)
committerStefan Roese <sr@denx.de>
Thu, 13 Jul 2023 08:26:27 +0000 (10:26 +0200)
commitd4360b4ecb06824b6a87f709c23f1fe073c70e15
treea7210e9e28f8a1078dc184347dce7fb7e550be25tree | snapshot
parentf52e2d884c222e879a68b61db217d49a070fa2e4commit | diff
mtd: nand: pxa3xx: Add support for the Marvell AC5 SoC

The NAND flash controller (NFC) on the AC5/AC5X SoC is the same as
the NFC used on other Marvell SoCs. It does have the additional
restriction of only supporting SDR timing modes up to 3.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
drivers/mtd/nand/raw/pxa3xx_nand.c diff | blob | history
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