spi: coreqspi: add xfer function for PolarFire SoC
authorEoin Dickson <eoin.dickson@microchip.com>
Tue, 8 Jul 2025 13:01:21 +0000 (18:31 +0530)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 17 Jul 2025 06:37:36 +0000 (14:37 +0800)
commitcde3d1ff309f491a49844d6e0eda25b24cc107f9
treeb16e42b122154f86b73330b7adae6844a6da58d9
parent63e8a80cb360a85b9c22f9b5bdb45eee9eeb8a40
spi: coreqspi: add xfer function for PolarFire SoC

Add xfer function to PolarFire SoC coreqspi driver. The read and write
operations are limited to one byte at a time instead of four as CMD18
(multiple block read) reads garbage when four byte ops are enabled.

Signed-off-by: Eoin Dickson <eoin.dickson@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
drivers/spi/microchip_coreqspi.c