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(parent: e4f5741) | patch
ARM: tegra210: clock: implement PLLD2 support
authorSvyatoslav Ryhel <clamor95@gmail.com>
Fri, 29 Nov 2024 06:14:21 +0000 (08:14 +0200)
committerSvyatoslav Ryhel <clamor95@gmail.com>
Wed, 12 Feb 2025 08:35:17 +0000 (10:35 +0200)
commitc3d8c206dc62a79eda44b1492decfbace151d17e
treee90cff7578cb1d07beee18e6a0b9529f40305e35tree | snapshot
parente4f5741c6dc3ba5d867336244c53eb092b273f60commit | diff
ARM: tegra210: clock: implement PLLD2 support

PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
arch/arm/include/asm/arch-tegra210/clock-tables.h diff | blob | history
arch/arm/mach-tegra/tegra210/clock.c diff | blob | history
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