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(parent: a942c0c) | patch
clk: mediatek: mt7622: add missing clock PERI_UART4_PD
authorChristian Marangi <ansuelsmth@gmail.com>
Sat, 3 Aug 2024 08:43:24 +0000 (10:43 +0200)
committerTom Rini <trini@konsulko.com>
Mon, 19 Aug 2024 22:15:26 +0000 (16:15 -0600)
commita776493f4b4b51515db456e635709a93e256dacd
tree60e59679c43a4e54ab01040f9db15ba27fef74c6tree | snapshot
parenta942c0c3f5d454241cf2c1d61d06a42dcd6a14cccommit | diff
clk: mediatek: mt7622: add missing clock PERI_UART4_PD

Add missing clock PERI_UART4_PD for peri clock gates. This is needed to
match upstream linux clk ID in preparation for OF_UPSTREAM.
Also convert infracfg to mux + gate implementation as now we have mux on
top of gates.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
drivers/clk/mediatek/clk-mt7622.c diff | blob | history
include/dt-bindings/clock/mt7622-clk.h diff | blob | history
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