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(parent: ef16992) | patch
arm: socfpga: soc64: Update reset manager registers for F2S bridge
authorAlif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Fri, 4 Apr 2025 02:07:02 +0000 (19:07 -0700)
committerTien Fong Chee <tien.fong.chee@intel.com>
Tue, 22 Apr 2025 03:47:39 +0000 (11:47 +0800)
commit9acad2b4c7214bb423a6221b67b0d7ea37edbdf7
tree97149ff2ca69eabffcd2b78b76d60eefd9dadd81tree | snapshot
parentef16992e3eab0eaa3c194fffd65bd8cc89050388commit | diff
arm: socfpga: soc64: Update reset manager registers for F2S bridge

Add reset manager registers in preparation for F2S bridge reset
support as well as the mask support to enable/disable the bridges.

Mask value:
BIT0: soc2fpga
BIT1: lwhps2fpga
BIT2: fpga2soc

These bridges are available only in Stratix10:
BIT3: f2sdram0
BIT4: f2sdram1
BIT5: f2sdram2

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h diff | blob | history
arch/arm/mach-socfpga/misc_soc64.c diff | blob | history
include/linux/intel-smc.h diff | blob | history
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