pci: zynqmp: Fix the pcireg base
authorVenkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Fri, 16 May 2025 09:23:14 +0000 (14:53 +0530)
committerMichal Simek <michal.simek@amd.com>
Mon, 2 Jun 2025 07:13:48 +0000 (09:13 +0200)
commit967eebcd85865b795351bfe4e77399b9f414c6c5
treee2bf3c48bdde97b94018145210df91e4f163af3c
parentb22a276f039f818d5564bec6637071cfc8a7e432
pci: zynqmp: Fix the pcireg base

The pcireg base is not assigned to any address, reading the
pcireg base with PS_LINKUP_OFFSET which is incorrect and
giving random values. So update the pcireg base from
devicetree so that we can read the valid PCIE link status
and PHY ready status.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Link: https://lore.kernel.org/r/20250516092314.939424-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
drivers/pci/pcie-xilinx-nwl.c