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(parent: 9c6c7e3) | patch
arm: dts: k3-*-ddr: Add ss_cfg reg entry
authorSanthosh Kumar K <s-k6@ti.com>
Mon, 6 Jan 2025 09:07:00 +0000 (14:37 +0530)
committerTom Rini <trini@konsulko.com>
Tue, 14 Jan 2025 21:47:07 +0000 (15:47 -0600)
commit8ff96fb6d01640cb8a468dba8200463bd4950c0a
treef46b15d9babc10342c52858952eb3d999ed3d25ctree | snapshot
parent9c6c7e30aa006a3eab52302e5399f5eb592184edcommit | diff
arm: dts: k3-*-ddr: Add ss_cfg reg entry

Add ss_cfg memory region which maps the DDRSS configuration region
for the memory controller node.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Tested-by: Neha Malcom Francis <n-francis@ti.com>
arch/arm/dts/k3-am62a-ddr.dtsi diff | blob | history
arch/arm/dts/k3-j721s2-ddr.dtsi diff | blob | history
arch/arm/dts/k3-j784s4-ddr.dtsi diff | blob | history
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