MIPS: Fix cpu_has_mips_r2_exec_hazard.
authorRalf Baechle <ralf@linux-mips.org>
Wed, 25 Mar 2015 12:14:16 +0000 (13:14 +0100)
committerBen Hutchings <ben@decadent.org.uk>
Thu, 6 Aug 2015 23:32:19 +0000 (00:32 +0100)
commit8feb2a714b3478b2cde5c576fd9f47ef44b60e8d
tree9141741b662a3be03226e70db98440c4b029cb2f
parent53493d44a771a3155ee12b6ac668fb2543d21a7a
MIPS: Fix cpu_has_mips_r2_exec_hazard.

commit 9cdf30bd3bac697fc533988f44a117434a858f69 upstream.

Returns a non-zero value if the current processor implementation requires
an IHB instruction to deal with an instruction hazard as per MIPS R2
architecture specification, zero otherwise.

For a discussion, see http://patchwork.linux-mips.org/patch/9539/.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[bwh: Backported to 3.2: trim the CPU type list]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
arch/mips/include/asm/cpu-features.h