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(parent: dcee0ed) | patch
board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH
authorGarrett Giordano <ggiordano@phytec.com>
Tue, 12 Nov 2024 20:40:23 +0000 (12:40 -0800)
committerTom Rini <trini@konsulko.com>
Wed, 4 Dec 2024 20:04:08 +0000 (14:04 -0600)
commit893ae07cc9b0050d635aad704c1bdae41477734a
tree56b617708abe86ab00874cc87d10f751b2f1e917tree | snapshot
parentdcee0ed33b979567c026010d46abcc2da8fb2492commit | diff
board: phytec: common: Introduce CONFIG_PHYTEC_K3_DDR_PATCH

Introduce CONFIG_PHYTEC_K3_DDR_PATCH to make DDR timing patch code
optional for PHYTEC K3 boards. This allows better control over which
boards receive DDR timing patches, rather than compiling the code for
all boards with K3_DDRSS enabled.

Also enable the feature by default for PHYCORE_AM62X_R5.

Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
arch/arm/mach-k3/am62x/Kconfig diff | blob | history
board/phytec/common/k3/Kconfig [new file with mode: 0644] blob
board/phytec/common/k3/Makefile diff | blob | history
board/phytec/phycore_am62x/Kconfig diff | blob | history
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