drm/i915: Only fence tiled region of object.
authorBob Paauwe <bob.j.paauwe@intel.com>
Thu, 18 Dec 2014 17:51:26 +0000 (09:51 -0800)
committerBen Hutchings <ben@decadent.org.uk>
Fri, 20 Feb 2015 00:49:39 +0000 (00:49 +0000)
commit875cf1b62db4f0cfe8c082c78f8f0bb7bb71bc9b
treeb9e2effd948f2009948e0d730d23f8c1c1d144bb
parent4e5cc195ae9d82ff725e7bbd9c23a048b2fedfca
drm/i915: Only fence tiled region of object.

commit af1a7301c7cf8912dca03065d448c4437c5c239f upstream.

When creating a fence for a tiled object, only fence the area that
makes up the actual tiles.  The object may be larger than the tiled
area and if we allow those extra addresses to be fenced, they'll
get converted to addresses beyond where the object is mapped. This
opens up the possiblity of writes beyond the end of object.

To prevent this, we adjust the size of the fence to only encompass
the area that makes up the actual tiles.  The extra space is considered
un-tiled and now behaves as if it was a linear object.

Testcase: igt/gem_tiled_fence_overflow
Reported-by: Dan Hettena <danh@ghs.com>
Signed-off-by: Bob Paauwe <bob.j.paauwe@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
[bwh: Backported to 3.2:
 - Adjust context, indentation
 - Apply to both i965_write_fence_reg() and sandybridge_write_fence_reg(),
   which have been combined into one function upstream]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
drivers/gpu/drm/i915/i915_gem.c