sunxi: A133: add DRAM init code
authorCody Eksal <masterr3c0rd@epochal.quest>
Sat, 12 Oct 2024 06:36:57 +0000 (03:36 -0300)
committerAndre Przywara <andre.przywara@arm.com>
Tue, 24 Jun 2025 00:59:09 +0000 (01:59 +0100)
commit7a337270c076e5d78d0f0e11af909af2a06359f6
tree89cd0de63cf4687d689ab16df941f472d6104518
parent184e7d0bb211b8885f6715fdd6149ce96a4d1037
sunxi: A133: add DRAM init code

This adds preliminary support for the DRAM controller in the Allwinner
A100/A133 SoCs.
This is work in progress, and has rough edges, but works on at least
three different boards. It contains support for DDR4 and LPDDR4.

Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest>
[Andre: formatting fixes, adapt to mainline, drop unused parameters,
remove struct struct sunxi_mctl_com_reg, hardcode MR registers,
switch to mctl_check_pattern(), remove simple DRAM check]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
arch/arm/include/asm/arch-sunxi/cpu_sun50i_h6.h
arch/arm/include/asm/arch-sunxi/dram.h
arch/arm/include/asm/arch-sunxi/dram_sun50i_a133.h [new file with mode: 0644]
arch/arm/mach-sunxi/Kconfig
arch/arm/mach-sunxi/Makefile
arch/arm/mach-sunxi/dram_sun50i_a133.c [new file with mode: 0644]
arch/arm/mach-sunxi/dram_timings/Makefile
arch/arm/mach-sunxi/dram_timings/a133_ddr4.c [new file with mode: 0644]
arch/arm/mach-sunxi/dram_timings/a133_lpddr4.c [new file with mode: 0644]