riscv: dts: th1520: Add DRAM controller
authorYao Zi <ziyao@disroot.org>
Tue, 13 May 2025 09:05:00 +0000 (09:05 +0000)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Wed, 21 May 2025 08:49:52 +0000 (16:49 +0800)
commit64735e56aa0ae5cf37fed25dbcc16934bfb2bfce
tree7d5cd3c1f434389a191bf3f3426e2fb3b8624f2c
parent17582da96c30435d9356a0cd5b74bee41a48c578
riscv: dts: th1520: Add DRAM controller

Describe DRAM controller integrated in TH1520 SoC and preserve it in SPL
devicetree blob.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
arch/riscv/dts/th1520.dtsi