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(parent: 279de75) | patch
riscv: andes_plic: Fix riscv_get_ipi() mask
authorBin Meng <bmeng.cn@gmail.com>
Tue, 15 Jun 2021 05:45:57 +0000 (13:45 +0800)
committerLeo Yu-Chi Liang <ycliang@andestech.com>
Thu, 17 Jun 2021 01:39:46 +0000 (09:39 +0800)
commit62ce0a02f9e5bda51a05c5f735e5a75f6c4bbb54
tree086819c8f5cbcab23e7932ab7d9aa747d3aed8e1tree | snapshot
parent279de759bd2ceb1dad6ff30c7d27c8ff9c5706a3commit | diff
riscv: andes_plic: Fix riscv_get_ipi() mask

Current logic in riscv_get_ipi() for Andes PLICSW does not look
correct. The mask to test IPI pending bits for a hart should be
left shifted by (8 * gd->arch.boot_hart), just the same as what
is done in riscv_send_ipi().

Fixes: 8b3e97badf97 ("riscv: add functions for reading the IPI status")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
arch/riscv/lib/andes_plic.c diff | blob | history
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