arm: socfpga: agilex: Probe DT for firewall setup
authorAlif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Mon, 4 Aug 2025 01:24:31 +0000 (18:24 -0700)
committerTien Fong Chee <tien.fong.chee@intel.com>
Fri, 8 Aug 2025 08:01:03 +0000 (16:01 +0800)
commit60a377db98734e81143df79b54a55afd6ecc4c74
tree2b7350b1b31a921d291d930d4c44310384b9cceb
parente328332aafe1dc59557d0b144f439509da7042e1
arm: socfpga: agilex: Probe DT for firewall setup

Update Agilex SPL code to implement device tree model
for firewall registers setup by using DTreg driver to
probe from device tree for the firewall settings instead
of calling firewall driver function.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
arch/arm/dts/socfpga_agilex-u-boot.dtsi
arch/arm/dts/socfpga_soc64_u-boot.dtsi [new file with mode: 0644]
arch/arm/mach-socfpga/spl_agilex.c